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BMC/Intel-BMC/linux.git
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dev-5.2
dev-5.3
dev-5.4
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master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
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arm64
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arch_gicv3.h
Age
Commit message (
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)
Author
Files
Lines
2018-03-22
irqchip/gic-v3: Probe for SCR_EL3 being clear before resetting AP0Rn
Marc Zyngier
1
-5
/
+0
2017-10-19
irqchip/gic-v3: Add support for Range Selector (RS) feature
Shanker Donthineni
1
-0
/
+5
2017-08-31
irqchip/gic-v3-its: Add VPE interrupt masking
Marc Zyngier
1
-0
/
+2
2017-08-31
irqchip/gic-v3-its: Add VPENDBASER/VPROPBASER accessors
Marc Zyngier
1
-0
/
+5
2017-06-15
arm64/kvm: sysreg: fix typo'd SYS_ICC_IGRPEN*_EL1
Mark Rutland
1
-1
/
+1
2017-03-09
arm64: sysreg: subsume GICv3 sysreg definitions
Mark Rutland
1
-68
/
+13
2016-11-29
irqchip/gic-v3-its: Specialise readq and writeq accesses
Vladimir Murzin
1
-0
/
+14
2016-11-29
irqchip/gic-v3-its: Specialise flush_dcache operation
Vladimir Murzin
1
-0
/
+3
2016-11-29
irqchip/gic-v3: Use nops macro for Cavium ThunderX erratum 23154
Will Deacon
1
-7
/
+2
2016-11-29
irqchip/gic-v3: Convert arm64 GIC accessors to {read,write}_sysreg_s
Will Deacon
1
-28
/
+17
2016-10-06
Merge tag 'kvm-4.9-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Linus Torvalds
1
-0
/
+13
2016-09-22
arm64: KVM: Move GIC accessors to arch_gicv3.h
Vladimir Murzin
1
-0
/
+13
2016-09-12
irqchip/gic-v3: Reset BPR during initialization
Daniel Thompson
1
-0
/
+6
2016-02-11
irqchip/gic-v3: Make sure read from ICC_IAR1_EL1 is visible on redestributor
Tirumalesh Chalamarla
1
-0
/
+1
2015-12-10
irqchip/gic-v3: Add missing include for barrier.h
Marc Zyngier
1
-0
/
+1
2015-10-10
irqchip/gic-v3: Specialize readq and writeq accesses
Jean-Philippe Brucker
1
-0
/
+3
2015-10-10
irqchip/gic-v3: Change unsigned types for AArch32 compatibility
Jean-Philippe Brucker
1
-14
/
+19
2015-10-10
irqchip/gic-v3: Refactor the arm64 specific parts
Jean-Philippe Brucker
1
-0
/
+162