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authorLogan Gunthorpe <logang@deltatee.com>2020-01-04 00:20:19 +0300
committerVinod Koul <vkoul@kernel.org>2020-01-15 17:10:51 +0300
commit905ca51e63be794331e09ff74ccddd44393d3378 (patch)
tree518af4e246446e17949112bb07ab04cdc6ac6a6f /drivers/dma/Kconfig
parent02939cd167095f16328a1bd5cab5a90b550606df (diff)
downloadlinux-905ca51e63be794331e09ff74ccddd44393d3378.tar.xz
dmaengine: plx-dma: Introduce PLX DMA engine PCI driver skeleton
Some PLX Switches can expose DMA engines via extra PCI functions on the upstream port. Each function will have one DMA channel. This patch is just the core PCI driver skeleton and dma engine registration. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Link: https://lore.kernel.org/r/20200103212021.2881-2-logang@deltatee.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/Kconfig')
-rw-r--r--drivers/dma/Kconfig9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 6fa1eba9d477..312a6cc36c78 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -497,6 +497,15 @@ config PXA_DMA
16 to 32 channels for peripheral to memory or memory to memory
transfers.
+config PLX_DMA
+ tristate "PLX ExpressLane PEX Switch DMA Engine Support"
+ depends on PCI
+ select DMA_ENGINE
+ help
+ Some PLX ExpressLane PCI Switches support additional DMA engines.
+ These are exposed via extra functions on the switch's
+ upstream port. Each function exposes one DMA channel.
+
config SIRF_DMA
tristate "CSR SiRFprimaII/SiRFmarco DMA support"
depends on ARCH_SIRF