From 905ca51e63be794331e09ff74ccddd44393d3378 Mon Sep 17 00:00:00 2001 From: Logan Gunthorpe Date: Fri, 3 Jan 2020 14:20:19 -0700 Subject: dmaengine: plx-dma: Introduce PLX DMA engine PCI driver skeleton Some PLX Switches can expose DMA engines via extra PCI functions on the upstream port. Each function will have one DMA channel. This patch is just the core PCI driver skeleton and dma engine registration. Signed-off-by: Logan Gunthorpe Link: https://lore.kernel.org/r/20200103212021.2881-2-logang@deltatee.com Signed-off-by: Vinod Koul --- drivers/dma/Kconfig | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'drivers/dma/Kconfig') diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index 6fa1eba9d477..312a6cc36c78 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -497,6 +497,15 @@ config PXA_DMA 16 to 32 channels for peripheral to memory or memory to memory transfers. +config PLX_DMA + tristate "PLX ExpressLane PEX Switch DMA Engine Support" + depends on PCI + select DMA_ENGINE + help + Some PLX ExpressLane PCI Switches support additional DMA engines. + These are exposed via extra functions on the switch's + upstream port. Each function exposes one DMA channel. + config SIRF_DMA tristate "CSR SiRFprimaII/SiRFmarco DMA support" depends on ARCH_SIRF -- cgit v1.2.3