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authorVladimir Murzin <vladimir.murzin@arm.com>2016-11-02 14:54:05 +0300
committerMarc Zyngier <marc.zyngier@arm.com>2016-11-29 12:14:48 +0300
commit328191c05ed72762c382bdb835607dd5bd56b0bc (patch)
tree7e14b0e9d5386a835cd46d0c9751765acec82399 /arch/arm64/include
parentd524eaa2a8c08efcdf905acf07cfa770e481ca6b (diff)
downloadlinux-328191c05ed72762c382bdb835607dd5bd56b0bc.tar.xz
irqchip/gic-v3-its: Specialise flush_dcache operation
It'd be better to switch to CMA... but before that done redirect flush_dcache operation, so 32-bit implementation could be wired latter. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm64/include')
-rw-r--r--arch/arm64/include/asm/arch_gicv3.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h
index 0313670a3e3f..546f92b32b62 100644
--- a/arch/arm64/include/asm/arch_gicv3.h
+++ b/arch/arm64/include/asm/arch_gicv3.h
@@ -79,6 +79,7 @@
#include <linux/stringify.h>
#include <asm/barrier.h>
+#include <asm/cacheflush.h>
#define read_gicreg read_sysreg_s
#define write_gicreg write_sysreg_s
@@ -171,5 +172,7 @@ static inline void gic_write_bpr1(u32 val)
#define gic_read_typer(c) readq_relaxed(c)
#define gic_write_irouter(v, c) writeq_relaxed(v, c)
+#define gic_flush_dcache_to_poc(a,l) __flush_dcache_area((a), (l))
+
#endif /* __ASSEMBLY__ */
#endif /* __ASM_ARCH_GICV3_H */