From 328191c05ed72762c382bdb835607dd5bd56b0bc Mon Sep 17 00:00:00 2001 From: Vladimir Murzin Date: Wed, 2 Nov 2016 11:54:05 +0000 Subject: irqchip/gic-v3-its: Specialise flush_dcache operation It'd be better to switch to CMA... but before that done redirect flush_dcache operation, so 32-bit implementation could be wired latter. Signed-off-by: Vladimir Murzin Signed-off-by: Marc Zyngier --- arch/arm64/include/asm/arch_gicv3.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm64/include') diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h index 0313670a3e3f..546f92b32b62 100644 --- a/arch/arm64/include/asm/arch_gicv3.h +++ b/arch/arm64/include/asm/arch_gicv3.h @@ -79,6 +79,7 @@ #include #include +#include #define read_gicreg read_sysreg_s #define write_gicreg write_sysreg_s @@ -171,5 +172,7 @@ static inline void gic_write_bpr1(u32 val) #define gic_read_typer(c) readq_relaxed(c) #define gic_write_irouter(v, c) writeq_relaxed(v, c) +#define gic_flush_dcache_to_poc(a,l) __flush_dcache_area((a), (l)) + #endif /* __ASSEMBLY__ */ #endif /* __ASM_ARCH_GICV3_H */ -- cgit v1.2.3