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path: root/drivers/watchdog
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2021-09-20wdt: dw: Fix passing NULL pointer to reset functionsSean Anderson1-5/+5
reset_*_bulk expects a real pointer. Fixes: 4f7abafe1c ("driver: watchdog: reset watchdog in designware_wdt_stop() function") Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-26watchdog: versal: Include header file needed for dev_ functionsAshok Reddy Soma1-0/+1
dev_dbg, dev_err and dev_warn seems to be moved to different header file. Include dm/device_compat.h file to compile properly. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-17Merge tag 'u-boot-imx-20210717' of ↵Tom Rini1-20/+37
https://gitlab.denx.de/u-boot/custodians/u-boot-imx i.MX ---- - mx7ulp : fix WDOG - imx8 : Phytec - USB3 support for i.MX8 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/8277
2021-07-17mx7ulp: wdog: Wait for WDOG unlock and reconfiguration to completeBreno Lima1-14/+25
According to i.MX7ULP Reference Manual we should wait for WDOG unlock and reconfiguration to complete. Section "59.5.3 Configure Watchdog" provides the following example: DisableInterrupts; //disable global interrupt WDOG_CNT = 0xD928C520; //unlock watchdog while(WDOG_CS[ULK]==0); //wait until registers are unlocked WDOG_TOVAL = 256; //set timeout value WDOG_CS = WDOG_CS_EN(1) | WDOG_CS_CLK(1) | WDOG_CS_INT(1) | WDOG_CS_WIN(0) | WDOG_CS_UPDATE(1); while(WDOG_CS[RCS]==0); //wait until new configuration takes effect EnableInterrupts; //enable global interrupt Update U-Boot WDOG driver to align with i.MX7ULP reference manual. Use 32 bits accessing to CS register. According to RM, the bits in this register only can write once after unlock. So using 8 bits access will cause problem. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Breno Lima <breno.lima@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-07-17mx7ulp: Update unlock and refresh sequences in sWDOG driverBreno Lima1-6/+12
According to i.MX7ULP Reference Manual the second word write for both UNLOCK and REFRESH operations must occur in maximum 16 bus clock. The current code is using writel() function which has a DMB barrier to order the memory access. The DMB between two words write may introduce some delay in certain circumstance, causing a WDOG timeout due to 16 bus clock window requirement. Replace writel() function by __raw_writel() to achieve a faster memory access and avoid such issue. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Breno Lima <breno.lima@nxp.com>
2021-07-16drivers: watchdog: wdt-uclass: Use IS_ENABLED for WATCHDOG_AUTOSTARTTeresa Remmet1-1/+1
There is no separate SPL/TPL config for WATCHDOG_AUTOSTART. So use IS_ENABLED instead of CONFIG_IS_ENABLED to make watchdog working in SPL again. Fixes: 830d29ac3721 ("watchdog: Allow to use CONFIG_WDT without starting watchdog") Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-16driver: watchdog: reset watchdog in designware_wdt_stop() functionMengLi1-4/+15
In uboot command line environment, watchdog is not able to be stopped with below commands: SOCFPGA_STRATIX10 # wdt dev watchdog@ffd00200 SOCFPGA_STRATIX10 # wdt stop Refer to watchdog driver in linux kernel, it is also need to reset watchdog after disable it so that the disable action takes effect. Signed-off-by: Meng Li <Meng.Li@windriver.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2021-07-06dm: define LOG_CATEGORY for all uclassPatrick Delaunay1-0/+2
Define LOG_CATEGORY for all uclass to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-01watchdog: cadence: Add expire_now methodMichal Simek1-1/+40
It is working in a way that only minimal timeout is setup to reach expiration just right after it is setup. Please make sure that PMUFW is compiled with ENABLE_EM flag. On U-Boot prompt you can test it like: ZynqMP> wdt dev watchdog@fd4d0000 ZynqMP> wdt list watchdog@fd4d0000 (cdns_wdt) ZynqMP> wdt dev dev: watchdog@fd4d0000 ZynqMP> wdt expire (And reset should happen here) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-27watchdog: use time_after_eq() in watchdog_reset()Rasmus Villemoes1-1/+1
Some boards don't work with the rate-limiting done in the generic watchdog_reset() provided by wdt-uclass. For example, on powerpc, get_timer() ceases working during bootm since interrupts are disabled before the kernel image gets decompressed, and when the decompression takes longer than the watchdog device allows (or enough of the budget that the kernel doesn't get far enough to assume responsibility for petting the watchdog), the result is a non-booting board. As a somewhat hacky workaround (because DT is supposed to describe hardware), allow specifying hw_margin_ms=0 in device tree to effectively disable the ratelimiting and actually ping the watchdog every time watchdog_reset() is called. For that to work, the "has enough time passed" check just needs to be tweaked a little to allow the now==next_reset case as well. Suggested-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Stefan Roese <sr@denx.de>
2021-04-15watchdog: Add booke watchdog driverChris Packham3-0/+114
Add a driver for the PowerPC Book E watchdog driver that is present on a number of Freescale/NXP SoCs. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-08wdt: dw: Free the clock on errorSean Anderson1-5/+13
The clock subsystem requires that clk_free be called on clocks obtained via clk_get_*. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-08wdt: dw: Enable the clock before using itSean Anderson1-0/+4
The watchdog won't work if the clock isn't enabled. Fixes: cf89ef8d10f240554541c20b2e1bdcdd58d1d7e6 Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-08wdt: dw: Switch to if(CONFIG()) instead of using #ifSean Anderson1-9/+9
This is preferred over #if because the compiler can check syntax even if the feature is disabled. This cannot be used for CONFIG_CLK because CONFIG_DW_WDT_CLOCK_KHZ is not defined on all platforms. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-08wdt: dw: Switch to using fls for log2Sean Anderson1-2/+1
log_2_n_round_up is only found in arm. fls performs the same job and is generic. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-06watchdog: Allow to use CONFIG_WDT without starting watchdogPali Rohár2-0/+18
In some cases it is useful to compile support for U-Boot command 'wdt' without starting HW watchdog in early U-Boot phase. For example when the user want to start the watchdog only on demand by some boot script. This change adds a new compile option WATCHDOG_AUTOSTART to control whether U-Boot should automatically start the watchdog during init phase or not. This option is enabled by default as it was the default behavior prior introducing this new change. When compiling U-Boot users can decide to turn this option off. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-04-06watchdog: Show error message when initr_watchdog() cannot start watchdogPali Rohár1-1/+7
Function wdt_start() may fail. So in initr_watchdog() function check return value of wdt_start() call and print error message when watchdog starting failed. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-04-06watchdog: Set/unset GD_FLG_WDT_READY flag in wdt_start()/wdt_stop()Pali Rohár1-3/+12
Watchdog is ready after successful call of ops->start() callback in wdt_start() function. And is stopped after successful call of ops->stop() callback in wdt_stop function. So move setting of GD_FLG_WDT_READY flag from initr_watchdog() function to wdt_start() and ensure that GD_FLG_WDT_READY flag is unset in wdt_stop() function. This change ensures that GD_FLG_WDT_READY flag is set only when watchdog is running. And ensures that flag is also also when watchdog was started not only by initr_watchdog() call (e.g. by U-Boot 'wdt' command). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-03-02reset: Remove addr parameter from reset_cpu()Harald Seiler2-2/+2
Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-23Merge tag 'xilinx-for-v2021.04-rc3' of ↵Tom Rini1-2/+1
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
2021-02-23clk: zynq: Add dummy clock enable functionMichal Simek1-2/+1
A lot of Xilinx drivers are checking -ENOSYS which means that clock driver doesn't have enable function. Remove this checking from drivers and create dummy enable function as was done for clk_fixed_rate driver by commit 6bf6d81c1112 ("clk: fixed_rate: add dummy enable() function"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-15Merge branch '2021-02-02-drop-asm_global_data-when-unused'Tom Rini8-0/+8
- Merge the patch to take <asm/global_data.h> out of <common.h>
2021-02-03dm: Rename DM_FLAG_REMOVE_WITH_PD_ONSimon Glass1-1/+1
This flag has the word 'REMOVE' in it which means it conflicts with the DM_REMOVE flags. Rename it to DM_FLAG_LEAVE_PD_ON which seems to indicate its purpose well enough. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass8-0/+8
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-24watchdog: add watchdog driver for MediaTek MT7620 SoCWeijie Gao3-0/+150
This patch adds watchdog support for the Mediatek MT7620 SoC Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-18wdt: aspeed: Add AST2600 watchdog supportChia-Wei, Wang3-0/+120
AST2600 has 8 watchdog timers including 8 sets of 32-bit decrement counters, based on 1MHz clock. A 64-bit reset mask is also supported to specify which controllers should be reset by the WDT reset. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-13watchdog: stm32mp: migrate trace to dev macroPatrick Delaunay1-3/+6
Change debug and pr_err to dev macro and define LOG_CATEGORY. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-06Merge tag 'v2021.01-rc5' into nextTom Rini1-1/+1
Prepare v2021.01-rc5 Signed-off-by: Tom Rini <trini@konsulko.com>
2020-12-19dm: Avoid accessing seq directlySimon Glass10-10/+10
At present various drivers etc. access the device's 'seq' member directly. This makes it harder to change the meaning of that member. Change access to go through a function instead. The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass2-10/+10
Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass7-14/+14
This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass2-6/+6
Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass2-26/+26
We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass18-19/+19
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-03watchdog: sbsa: timeout should be in "millisecond"Zhao Qiang1-1/+1
timeout should be in "millisecond" instead of second, so divided it by 1000 when calculate the load value. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
2020-11-01watchdog: Hide WATCHDOG_RESET_DISABLEMichael Walle1-6/+7
This option is only supported by the IMX watchdog and seems to be similar to CONFIG_WATCHDOG. Move it below the IMX watchdog and make it dependent on IMX_WATCHDOG. Signed-off-by: Michael Walle <michael@walle.cc>
2020-10-16watchdog: octeontx_wdt: Add support for start and stopSuneel Garapati1-5/+83
This patch enhances the Octeon TX/TX2 watchdog driver to fully enable the WDT. With this changes, the "wdt" command is now also supported on these platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Suneel Garapati <sgarapati@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com>
2020-10-08wdt: designware: fix timeout calculation due to expecting KHzJack Mitchell1-1/+1
The timeout calculation is based on the clk being in KHz but the clk api returns the clk value in Hz. Convert this to KHz to calculate the correct timeout value. Signed-off-by: Jack Mitchell <ml@embed.me.uk>
2020-08-25watchdog: Add reset support for OcteonTX / TX2Suneel Garapati3-0/+77
Adds support for Core 0 watchdog poke on OcteonTX and OcteonTX2 platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22treewide: convert devfdt_get_addr_ptr() to dev_read_addr_ptr()Masahiro Yamada1-1/+1
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To help this tedious work, this commit converts devfdt_get_addr_ptr() to dev_read_addr_ptr() by coccinelle. I also removed redundant casts because dev_read_addr_ptr() returns an opaque pointer. To generate this commit, I ran the following semantic patch excluding include/dm/. <smpl> @@ type T; expression dev; @@ -(T *)devfdt_get_addr_ptr(dev) +dev_read_addr_ptr(dev) @@ expression dev; @@ -devfdt_get_addr_ptr(dev) +dev_read_addr_ptr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22dm: core: Fix devfdt_get_addr_ptr return valueOvidiu Panait1-2/+2
According to the description of devfdt_get_addr_ptr, this function should return NULL on failure, but currently it returns (void *)FDT_ADDR_T_NONE. Fix this by making devfdt_get_addr_ptr return NULL on failure, as described in the function comments. Also, update the drivers currently checking (void *)FDT_ADDR_T_NONE to check for NULL. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-11watchdog: Add support for K3 RTI watchdogJan Kiszka3-0/+131
This is based on the Linux kernel driver for the RTI watchdog. To actually reset the system on an AM65x, it requires firmware running on the R5 that accepts the NMI and issues the actual system reset via TISCI. Kind of an iTCO, except that this watchdog hardware has support for no-way-out, and only for that. On the J721E, reset works without extra firmware help when routing the RTI interrupt via the ESM. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2020-07-27Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini3-0/+141
- Bug fixes and updates on ls2088a,ls1028a, ls1046a, ls1043a, ls1012a - lx2-watchdog support - layerscape: pci-endpoint support, spin table relocation fixes and cleanups - fsl-crypto: RNG support and bug fixes
2020-07-27Watchdog: introduce ARM SBSA watchdog driverZhao Qiang3-0/+141
According to Server Base System Architecture (SBSA) specification, the SBSA Generic Watchdog has two stage timeouts: the first signal (WS0) is for alerting the system by interrupt, the second one (WS1) is a real hardware reset. More details about the hardware specification of this device: ARM DEN0029B - Server Base System Architecture (SBSA) This driver can operate ARM SBSA Generic Watchdog as a single stage In the single stage mode, when the timeout is reached, your system will be reset by WS1. The first signal (WS0) is ignored. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-25treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada1-1/+1
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-25treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()Masahiro Yamada1-1/+1
Use the _ptr suffixed variant instead of casting. Also, convert it to dev_read_addr_ptr(), which is safe to CONFIG_OF_LIVE. One curious part is an error check like follows in drivers/watchdog/omap_wdt.c: priv->regs = (struct wd_timer *)devfdt_get_addr(dev); if (!priv->regs) return -EINVAL; devfdt_get_addr() returns FDT_ADDR_T_NONE (i.e. -1) on error. So, this code does not catch any error in DT parsing. dev_read_addr_ptr() returns NULL on error, so this error check will work. I generated this commit by the following command: $ find . -name .git -prune -o -name '*.[ch]' -type f -print | \ xargs sed -i -e 's/([^*)]*\*)devfdt_get_addr(/dev_read_addr_ptr(/' I manually fixed drivers/usb/host/ehci-mx6.c Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-24Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"Tom Rini2-2/+2
This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-20treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada1-1/+1
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-20treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()Masahiro Yamada1-1/+1
Use the _ptr suffixed variant instead of casting. Also, convert it to dev_read_addr_ptr(), which is safe to CONFIG_OF_LIVE. One curious part is an error check like follows in drivers/watchdog/omap_wdt.c: priv->regs = (struct wd_timer *)devfdt_get_addr(dev); if (!priv->regs) return -EINVAL; devfdt_get_addr() returns FDT_ADDR_T_NONE (i.e. -1) on error. So, this code does not catch any error in DT parsing. dev_read_addr_ptr() returns NULL on error, so this error check will work. I generated this commit by the following command: $ find . -name .git -prune -o -name '*.[ch]' -type f -print | \ xargs sed -i -e 's/([^*)]*\*)devfdt_get_addr(/dev_read_addr_ptr(/' I manually fixed drivers/usb/host/ehci-mx6.c Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-16watchdog: imx: Support set timeout by wdt commandMo, Yuezhang1-5/+13
After "4b969deac0 watchdog: imx: Add DM support", the imx watchdog can be started by wdt command. But the imx watchdog driver only support start with the default timeout. This commit adds the support for setting the timeout which pass from the wdt command into the imx watchdog. If the timeout out of the valid range(0.5~128s), start the watchdog with a timeout within the valid range and the timeout is the one which closest to the passed timeout. Signed-off-by: Yuezhang.Mo <yuezhang.mo@sony.com> Reviewed-by: Andy.Wu <Andy.Wu@sony.com> Reviewed-by: stefano Babic <sbabic@denx.de>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-13 06:41:41 +0300