starfive-tech/u-boot.git - StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)

Age	Commit message (Collapse)	Author	Files	Lines
2023-07-20	board: starfive: evb: use dram_init in spl	Samin Guo	1	-2/+0
	dram_init call fdtdec_setup_mem_size_base, so starfive_ddr.c do not need it. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-19	dram: starfive: jh7110: Add ddr4 support	Samin Guo	6	-68/+2706
	Add ddr4 tuning support (sync from devkits) Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-10	dram: starfive: jh7110: Add 1G support	Samin Guo	4	-29/+46
	add 1G DDR tuning cfg Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-04-23	board: starfive: copyright: Standardize the copyright format	Yanhong Wang	6	-7/+6
	Unify the content format of the copyright section Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
2022-10-18	ram: starfive: Make DDR driver support 8G size	Yan Hong Wang	4	-733/+547
	This patch include four items: 1.rename the driver compatible name. 2.reset action with the common API. 3.clean up code to make it is closer to readable. 4.add configuration to support 8G size Signed-off-by: Yan Hong Wang <yanhongwang@linux.starfivetech.com>
2022-10-18	ram: starfive: jh7110: Replace the configuration operation for pll1 clk	Yan Hong Wang	2	-27/+6
	Replace the configuration operation for pll1 clk with common api provide by pll module. Signed-off-by: Yan Hong Wang <yanhong.wang@starfivetech.com>
2022-10-18	ram:starfive: Make ddr driver support 2G size	yanhong.wang	4	-25/+250
	The ddr driver include two configs with 2G and 4G.Fist read the ddr size config from the memory node in the dts,then match the right config and do it. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18	ram:starfive: add ddr driver	yanhong.wang	8	-0/+3199
	Add driver for JH7110 to support ddr initialization in SPL. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com> Signed-off-by: samin <samin.guo@starfivetech.com>