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2023-04-23board: starfive: copyright: Standardize the copyright formatYanhong Wang1-1/+1
Unify the content format of the copyright section Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
2023-01-03misc: OTP: Starfive-jh7110: update the return value of starfive_otp_readYanhong Wang1-3/+12
Update the return value to match the function prototype definition. Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
2022-10-18misc:OTP:Starfive-jh7110: Add driver for the Starfive otp controlleryanhong.wang3-0/+196
Added a misc driver to handle OTP memory in Starfive SoCs. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2021-08-09imx8ulp: move struct mu_type to common headerPeng Fan1-18/+1
Move struct mu_type to common header to make it reusable by upower and S400 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09driver: misc: imx8ulp: Add fuse driver for imx8ulpYe Li2-0/+199
This driver uses FSB to read some fuses, but not support program fuse. It only works in SPL (secure mode), u-boot needs traps to ATF to read them. Some fuses can read from S400 API and others are from FSB. Also support program some fuses via S400 API Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09arm: imx8ulp: release and configure XRDC at early phaseYe Li1-16/+20
Since S400 will set the memory of SPL image to R/X. We can't write to any data in SPL image. 1. Set the parameters save/restore only for u-boot, not for SPL. to avoid write data. 2. Not use MU DM driver but directly call MU API to send release XRDC to S400 at early phase. 3. Configure the SPL image memory of SRAM2 to writable (R/W/X) Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09drivers: misc: s400_api: Update API for fuse read and writeYe Li1-0/+81
Add API to support fuse read and write Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09drivers: misc: imx8ulp: Update S400 API for release RDCYe Li1-2/+5
The RDC API is updated to add a field for XRDC or TRDC Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09drivers: misc: imx8ulp: Add S400 API for image authenticationYe Li1-1/+120
Add S400 API for image authentication Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09drivers: misc: s400_api: Update S400_SUCCESS_IND to 0xd6Ye Li1-1/+1
According to latest S400 API doc, the the success indicate value is changed to 0xd6. So update the driver codes. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09driver: misc: Add MU and S400 API to communicate with SentinelYe Li4-0/+292
Add MU driver and S400 API. Need enable MISC driver to work Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-02global: Convert simple_strtoul() with hex to hextoul()Simon Glass1-5/+5
It is a pain to have to specify the value 16 in each call. Add a new hextoul() function and update the code to use it. Add a proper comment to simple_strtoul() while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-29pci: swap_case: Allow compilation on 32-bit machinesSimon Glass1-2/+11
At present this driver assumes that ulong is 64-bits long. On 32-bit machines it is not. Use the 64-bit code only on 64-bit machines. This makes things work correctly on 32-bit machines. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-21cros_ec: Use standard calls for recovery-request checkingSimon Glass1-7/+11
Rather than calling directly into the sandbox SDL code, we can use the normal U-Boot console handling for this feature. Update the code, to make it more generic. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-21cros_ec: Support the full-size vboot contextSimon Glass1-5/+3
The v2 format is 64-bytes in size. Support this and drop v1 since it is not used anymore. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-21cros_ec: Drop cros_ec_entering_mode()Simon Glass2-14/+0
This function is not needed anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-21cros_ec: Allow reading the battery-charge stateSimon Glass1-0/+17
Add a function to read this information from the EC. It is useful for determining whether the battery has enough charge to boot. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-16sandbox: cros_ec: Update error handling when reading matrixSimon Glass1-5/+7
At present the return value of ofnode_get_property() is not checked, which causes a coverity warning. While we are here, use logging for the errors. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Coverity (CID: 331157)
2021-07-14misc: i2c_eeprom: Add atmel,24c01 to the listMarek Vasut1-0/+1
Linux kernel binding is using atmel,24c01 compatible string. On the other hand there is atmel,24c01a which is not listed in the kernel. Add compatible string without "a" suffix to be compatible with Linux kernel binding. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-06sandbox: cros-ec: Add tests for the Chromium OS EC PWM driverAlper Nebi Yasak1-0/+47
This patch adds a limited pulse-width modulator to sandbox's Chromium OS Embedded Controller emulation. The emulated PWM device supports multiple channels but can only set a duty cycle for each, as the actual EC doesn't expose any functionality or information other than that. Though the EC supports specifying the PWM channel by its type (e.g. display backlight, keyboard backlight), this is not implemented in the emulation as nothing in U-Boot uses this type specification. This emulated PWM device is then used to test the Chromium OS PWM driver in sandbox. Adding the required device node to the sandbox test device-tree unfortunately makes it the first PWM device, so this also touches some other tests to make sure they still use the sandbox PWM. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-06dm: define LOG_CATEGORY for all uclassPatrick Delaunay5-0/+11
Define LOG_CATEGORY for all uclass to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-20misc: make CONFIG_IRQ selectable for all platformsWasim Khan1-3/+2
UCLASS_IRQ driver is not Intel specific. Make CONFIG_IRQ selectable for all platforms. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-13qemu: add MMIO driver for QFWAsherah Connor3-0/+127
Add MMIO driver for QFW. Note that there is no consumer as of this patch. Signed-off-by: Asherah Connor <ashe@kivikakk.ee> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-04-13test: qemu: add qfw sandbox driver, dm tests, qemu testsAsherah Connor2-0/+128
A sandbox driver and test are added for the qfw uclass, and a test in QEMU added for qfw functionality to confirm it doesn't break in real world use. Signed-off-by: Asherah Connor <ashe@kivikakk.ee> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-04-13x86: qemu: move QFW to its own uclassAsherah Connor4-162/+166
We move qfw into its own uclass and split the PIO functions into a specific driver for that uclass. The PIO driver is selected in the qemu-x86 board config (this covers x86 and x86_64). include/qfw.h is cleaned up and documentation added. Signed-off-by: Asherah Connor <ashe@kivikakk.ee> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2021-04-10pwm: Add a driver for Chrome OS EC PWMAlper Nebi Yasak1-0/+17
This PWM is used in rk3399-gru-bob and rk3399-gru-kevin to control the display brightness. We can only change the duty cycle, so on set_config() we just try to match the duty cycle that dividing duty_ns by period_ns gives us. To disable, we set the duty cycle to zero while keeping the old value for when we want to re-enable it. The cros_ec_set_pwm_duty() function is taken from Depthcharge's cros_ec_set_bl_pwm_duty() but modified to use the generic pwm type. The driver itself is very loosely based on rk_pwm.c for the general pwm driver structure. The devicetree binding file is from Linux, before it was converted to YAML at 5df5a577a6b4 ("dt-bindings: pwm: Convert google,cros-ec-pwm.txt to YAML format") in their repo. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-08misc: ocotp: Update OCOTP driver for iMX8MQ B2Ye Li1-1/+1
i.MX8MQ B2 also has fixed value in OCOTP_READ_FUSE_DATA register, so it does not support "fuse sense" command like B1. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-03-27sandbox: cros_ec: Only write EC state when the EC is probedSimon Glass1-0/+4
This can crash if the EC has not yet been probed. Add a check to prevent this. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27x86: Make coreboot sysinfo available to any x86 boardSimon Glass1-1/+1
It is possible to boot U-Boot for chromebook_coral either 'bare metal' or from coreboot. In the latter case we want to provide access to the coreboot sysinfo tables. Move the definitions into a file available to any x86 board. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27x86: p2sb: Drop LOG_DEBUGSimon Glass1-1/+0
We should not enable debugging by default. Drop this. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26dm: Rename device_get_by_driver_info_idx()Simon Glass1-1/+1
This function finds a device by its driver_info index. With of-platdata-inst we do not use driver_info, but instead instantiate udevice records at build-time. However the semantics of using the function are the same in each case: the caller provides an index and gets back a device. So rename the function to device_get_by_ofplat_idx(), so that it can be used for both situations. The caller does not really need to worry about the details. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22dtoc: Generate device instancesSimon Glass1-0/+4
Add support for generating a file containing udevice instances. This avoids the need to create these at run time. Update a test uclass to include a 'per_device_plat_auto' member, to increase test coverage. Add another tab to the driver_info output so it lines up nicely like the device-instance output. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22dtoc: Generate uclass devicesSimon Glass1-0/+1
Add support for generating a file containing uclass instances. This avoids the need to create these at run time. Update a test uclass to include a 'priv_auto' member, to increase test coverage. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22dtoc: Assign a sequence number to each nodeSimon Glass1-2/+4
Now that we have the alias information we can assign a sequence number to each device in the uclass. Store this in the node associated with each device. This requires renaming the sandbox test drivers to have the right name. Note that test coverage is broken with this patch, but fixed in the next one. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-02-21dm: i2c: allow disabling driver model in SPLIgor Opaniuk1-1/+1
At present if U-Boot proper uses driver model for I2C, then SPL has to also. While this is desirable, it places a significant barrier to moving to driver model in some cases. For example, with a space-constrained SPL it may be necessary to enable CONFIG_SPL_OF_PLATDATA which involves adjusting some drivers. This patch introduces a separate Kconfig symbols for enabling DM_I2C and DM_I2C_GPIO support in SPL. This will also help to get away from dirty workarounds to achieve non-DM I2C support for SPL, which is currently used in some board header files like: ifdef CONFIG_SPL_BUILD undef CONFIG_DM_I2C endif Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass7-0/+7
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-31cros_ec: Add vstore supportSimon Glass2-2/+121
The EC can store small amounts of data for the benefit of the verified boot process. Since the EC is seldom reset, this can allow the AP to store data that survives a reboot or a suspend/resume cycle. Add support for this. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-31cros_ec: Allow use with of-platdataSimon Glass1-0/+2
Avoid reading the device tree when of-platdata is in use. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-31cros_ec: Show events in human-readable formSimon Glass1-1/+11
Add a command to show the current events as a list of names. This is easier to decipher than a bit mask. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-31cros_ec: Add support for switchesSimon Glass3-0/+33
On x86 platforms the EC provides a way to read 'switches', which are on/off values determined by the EC. Add a new driver method for this and implement it for LPC. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-31cros_ec: Support reading EC featuresSimon Glass2-6/+31
The EC can support a variety of features and provides a way to find out what is available. Add support for this. Also update the feature list to the lastest available while we are here. This is at: https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/master/include/ec_commands.h Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-31cros_ec: Add support for reading the SKU IDSimon Glass2-0/+20
This allows reading strapping pins attached to the EC. Add an implementation for this. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-31cros_ec: Add run-time check for input buffer overflowSimon Glass1-0/+2
This should not happen in normal operation, but the EC might have a bug, so add a run-time check just in case. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-31cros_ec: Tidy up a few delaysSimon Glass1-7/+17
Allow a longer time for the EC to reboot. Also use a constant for the hash delay time, so it is clear what it is for. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-31cros_ec: Add a function for the hello messageSimon Glass2-15/+43
This is used several times in this file. Put it in a function to avoid code duplication. Also add a test for this function. There are no cros_ec tests at present, so it is time to update the code. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-13misc: rcc: keep the rcc device name for subnodePatrick Delaunay1-2/+2
Update the name associated with the RCC drivers to avoid duplicated name with the driver name. With this patch the traces displayed with log macro provide a correct device name. The rcc device name before the patch is: Class Index Probed Driver Name ----------------------------------------------------------- root 0 [ + ] root_driver root_driver simple_bus 0 [ + ] simple_bus |-- soc (...) nop 0 [ + ] stm32-rcc | |-- rcc@50000000 clk 0 [ + ] stm32mp1_clk | | |-- stm32mp1_clk reset 0 [ + ] stm32_rcc_reset | | `-- stm32_rcc_reset And they become: (...) nop 0 [ + ] stm32-rcc | |-- rcc@50000000 clk 0 [ + ] stm32mp1_clk | | |-- rcc@50000000 reset 0 [ + ] stm32_rcc_reset | | `-- rcc@50000000 The traces is correct: stm32mp1_clk rcc@stm32mp1_clk: ..... => stm32mp1_clk rcc@50000000: ..... Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13misc: rcc: migrate trace to dev macroPatrick Delaunay1-2/+4
Change debug and pr_err to dev macro and define LOG_CATEGORY. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-06Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into nextTom Rini13-33/+256
Driver model: make some udevice fields private Driver model: Rename U_BOOT_DEVICE et al. dtoc: Tidy up and add more tests ns16550 code clean-up x86 and sandbox minor fixes for of-platdata dtoc prepration for adding build-time instantiation
2021-01-06Merge tag 'v2021.01-rc5' into nextTom Rini2-11/+9
Prepare v2021.01-rc5 Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-05dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()Simon Glass3-10/+10
In the spirit of using the same base name for all of these related macros, rename this to have the operation at the end. This is not widely used so the impact is fairly small. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-04 13:23:15 +0300