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path: root/drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c
AgeCommit message (Expand)AuthorFilesLines
2020-07-09mv_ddr: ddr3: Update {min,max}_read_sample calculationChris Packham1-2/+2
2020-07-09mv_ddr: ddr3: Use correct bitmask for read sample delayChris Packham1-1/+1
2019-03-19mv_ddr: ddr3: only use active chip-selects when tuning ODTChris Packham1-1/+2
2018-12-08ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02Chris Packham1-0/+1
2018-05-14ARM: mvebu: a38x: sync ddr training code with upstreamChris Packham1-57/+41
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini1-2/+1
2018-01-19ddr: marvell: update additional ODT settingChris Packham1-8/+14
2015-07-23arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdrStefan Roese1-0/+686