| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2021-02-26 | ddr: marvell: a38x: disable WL phase correction stage in case of bus_width=16bit | Moti Buskila | 1 | -0/+3 |
| 2019-03-19 | mv_ddr: ddr3: fix tRAS timimg parameter | Chris Packham | 1 | -4/+4 |
| 2018-12-08 | ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 | Chris Packham | 1 | -59/+113 |
| 2018-05-14 | ARM: mvebu: a38x: sync ddr training code with upstream | Chris Packham | 1 | -52/+215 |
| 2018-05-07 | SPDX: Convert all of our single license tags to Linux Kernel style | Tom Rini | 1 | -2/+1 |
| 2018-01-19 | ddr: marvell: update ddr controller init and freq | Chris Packham | 1 | -8/+11 |
| 2015-07-23 | arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr | Stefan Roese | 1 | -0/+652 |
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index : starfive-tech/u-boot.git | |
| StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |