| Age | Commit message (Collapse) | Author | Files | Lines |
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Output gpio62 low for switching to USB host by default.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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eMMC version
Set sdio0 bus-width to 8 when using VF2 Lite eMMC version.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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CR_20104_eeprom_hal.feng
See merge request sdk/u-boot!112
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Add VF2 Lite logo and display it.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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Avoid the product_id is NULL.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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Get emmc size from eeprom and add VF2 Lite eMMC version
fdt configuration.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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Export a function get_mmc_size_from_eeprom() to read the eMMC size.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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Supprot selecting DT according to eeprom information.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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Add wifi_bt field in ATOM4. Add "mac wifi_bt <?>" command.
Update eeprom data format version to 3.
Add VisionFive 2 Lite support.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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Move get_vf2_board_type() to eeprom driver and export it.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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Add vf2_board_type env variable to identify VF2, VF2 CM and VF2 Lite.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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Export a function get_product_id_from_eeprom() to read the product ID.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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show message when read eeprom
Signed-off-by: Ziv Xu <ziv.xu@starfivetech.com>
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CR_12375 board: AMP: Add chip type and board type to share ram
See merge request sdk/u-boot!86
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Add chip type and board type to rtos share ram. So RTOS side
can get chip type set gmac configuration.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
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Signed-off-by: Ziv Xu <ziv.xu@starfivetech.com>
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Enable devkits UART2 for rtos and move rtos image to running
memory. The image size is 832KB.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
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In AMP case, one GMAC is moved to RTOS side. u-boot dts node
is disabled, RTOS need to get the MAC address. So u-boot write
the MAC address to share RAM.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
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In AMP case, one GMAC is moved to RTOS side. u-boot dts node
is disabled, RTOS need to get the MAC address. So u-boot write
the MAC address to share RAM.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
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Enable UART2 for rtos and move rtos image to running memory.
The image size is 832KB.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
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CR_9208_VF2_EEPROM_ziv.xu
See merge request sdk/u-boot!77
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The system will read cpu info from OTP, but if
the OTP read fails or OTP driver is not enabled,
then the cpu voltage script will fail to delete
cpu frequencies node in dts file.
Add the default cpu max voltage to avoid these
corner cases.
Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
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change eeprom write pagesize
Signed-off-by: Ziv Xu <ziv.xu@starfivetech.com>
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Add board support for StarFive Devkits.
The code is ported from tag JH7110_DVK_515_v3.9.3 of Devkits repo.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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Add board support for StarFive VisionFive 2.
The code is ported from tag JH7110_VF2_515_v3.9.3 of VF2 repo.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
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add get_boot_mode function to support Multi-device boot
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
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Set eMMC/sd clk's DR to 2 and set its SR to 1.
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
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Synchronize from vf2 to the dynamic CMA scheme
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
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Add board-level resize-DDR function for evb
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
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Remove max cpu voltages: 1.12v, 1.10v, 1.08v.
Set the cpu max frequency to 1.25G per OTP value.
Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
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Unify the content format of the copyright section
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
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CR4563:Configure the l2 prefetcher parameter
See merge request sdk/u-boot!48
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Update the cpu voltage set commands per
binning information from OTP.
Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
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It should be configured in L2.
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
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CR_4094 display: update uboot logo display function:
See merge request sdk/u-boot!42
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Add two more binning IC types, and set add their
max cpu voltage accordingly.
Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
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Get the binning information from OTP,
and set change the cpu max voltage accordingly.
Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
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add board_late_init to init display memory
config the bitmap picture
Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>
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Update the return value to match the function prototype definition.
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
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Set to 1000M to ensure the CPU can work normally under 0.8V`
voltage
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
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Remove usb/sdio0/sdio1 gpio init.
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
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Switch the QSPI parent clock to pll0 to improve the QSPI speed
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
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JH7110B requires a higher IOPAD capability in 1000M mode.
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
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Read the chip model from the rgpio3 and setenv "chip_vision"
1: jh7110B
0: JH7110A
defalut: JH7110A
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
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JH7110B needs switch gmac0/1 tx to rgmii phy.
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
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Switch the pll2 clk to 1188M with the comm pll interface on JH7110.
Signed-off-by: Yan Hong Wang <yanhong.wang@starfivetech.com>
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Signed-off-by: samin <samin.guo@starfivetech.com>
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The cpu uses 1.25G by default.
Lists of frequencies(MHz):
-375/500/625/750/875/1000/1250
-1375/1500/1625/1750/1800
Note: Some frequencies require voltage regulation.
Signed-off-by: samin <samin.guo@starfivetech.com>
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replace them with spl_cpu_set_rate.
Signed-off-by: samin <samin.guo@starfivetech.com>
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