summaryrefslogtreecommitdiff
path: root/arch/x86/cpu/coreboot
AgeCommit message (Collapse)AuthorFilesLines
2021-07-15x86: coreboot: Use vendor in the KconfigSimon Glass1-1/+1
Use VENDOR_COREBOOT instead of TARGET_COREBOOT so we can have multiple coreboot boards, sharing options. Only SYS_CONFIG_NAME needs to be defined TARGET_COREBOOT. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-24treewide: Convert macro and uses of __section(foo) to __section("foo")Marek Behún1-1/+1
This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-27x86: Allow installing an e820 when booting from corebootSimon Glass1-26/+1
Move this code into a generic location so that it can be used by other x86 boards which want to boot from coreboot. Also ensure that this is called if booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27x86: Move coreboot sysinfo parsing into generic x86 codeSimon Glass2-256/+0
It is useful to be able to parse coreboot tables on any x86 build which is booted from coreboot. Add a new Kconfig option to enable this feature and move the code so it can be used on any board, if enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27x86: Move coreboot timestamp info into coreboot_tables.hSimon Glass1-12/+0
This all relates to the sysinfo structure provided by coreboot. Put the timestamp definitions into the same file as the others. Tidy up a few comments at the same time. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27x86: Make coreboot sysinfo available to any x86 boardSimon Glass4-4/+4
It is possible to boot U-Boot for chromebook_coral either 'bare metal' or from coreboot. In the latter case we want to provide access to the coreboot sysinfo tables. Move the definitions into a file available to any x86 board. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass3-0/+3
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-17x86: Rename board_final_cleanup() to board_final_init()Simon Glass1-2/+2
This function sounds like something that is called when U-Boot is about to jump to Linux. In fact it is an init function. Rename it to reduce confusion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17x86: Store the coreboot table address in global_dataSimon Glass1-1/+7
At present this information is used to locate and parse the tables but is not stored. Store it so that we can display it to the user, e.g. with the 'bdinfo' command. Note that now the GD_FLG_SKIP_LL_INIT flag is set in get_coreboot_info(), so it is always set when booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-05-27x86: coreboot: add SMBIOS cbmem entry parsingChristian Gmeiner1-0/+14
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-05-19common: Drop init.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop bootstage.h from common headerSimon Glass1-0/+1
Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-04x86: coreboot: Allow building an SPL imageSimon Glass3-2/+21
Make a few adjustments to allow us to build an SPL image for coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-05-04x86: Allow building an SPL image for corebootSimon Glass1-0/+1
Coreboot runs in 32-bit mode and cannot run a 64-bit U-Boot. To get around this we can build a combined image with 32-bit SPL and 64-bit U-Boot. Add a build rule and binman definition for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-30x86: Move coreboot-table detection into common codeSimon Glass1-15/+9
To support detecting booting from coreboot, move the code which locates the coreboot tables into a common place. Adjust the algorithm slightly to use a word comparison instead of string, since it is faster. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct the comments to 960KB] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16x86: Correct wording of coreboot source codeSimon Glass1-2/+2
Some files are taken or modified from coreboot, but the files are no-longer part of the coreboot project. Fix the wording in a few places. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2019-12-15x86: timer: use a timer base of 0Simon Glass1-0/+1
On x86 platforms the timer is reset to 0 when the SoC is reset. Having this as the timer base is useful since it provides an indication of how long it takes before U-Boot is running. When U-Boot sets the timer base to something else, time is lost and we no-longer have an accurate account of the time since reset. This particularly affects bootstage. Change the default to not read the timer base, leaving it at 0. Add an option for when U-Boot is the secondary bootloader. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-03common: Move board_get_usable_ram_top() out of common.hSimon Glass1-0/+1
Move this function into init.h which seems to be designed for this sort of thing. Also update the header to declare struct global_data so that it can be included without global_data.h being needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-03common: Move checkcpu() out of common.hSimon Glass1-0/+1
This function belongs in cpu_func.h so move it over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-08-18x86: Remove x86 specific GD flags as they are not referenced at allStefan Roese1-3/+0
This patch removes the x86 architecture specific GD flags (GD_FLG_COLD_BOOT & GD_FLG_WARM_BOOT), as they are not used. Only GD_FLG_COLD_BOOT is referenced in coreboot.c but assigned in start16.S. But the coreboot target does not use start16.S at all and boots directly from the 32-bit start code. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-19x86: coreboot: make it possible to process unhandled tagsChristian Gmeiner1-0/+7
coreboot makes it possible to add own entries into coreboot's table at a per mainboard basis. As there might be some custom ones it makes sense to provide a way to process them. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-12-10coreboot: only init usb if necessaryThomas RIENOESSL1-1/+2
Up until now the call to initialize the USB subsystem was hardcoded for U-Boot running as a coreboot payload. This was used to enable the use of a USB keyboard in the U-Boot shell. However not all boards might need this functionality. As initializing the USB subsystem can take a considerable amount of time (several seconds on some boards), we now initialize the USB subsystem only if U-Boot is configured to use USB keyboards. Signed-off-by: Thomas RIENOESSL <thomas.rienoessl@bachmann.info> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-10-09x86: Update mtrr functions to allow leaving cache aloneSimon Glass1-2/+2
At present the mtrr functions disable the cache before making changes and enable it again afterwards. This is fine in U-Boot, but does not work if running in CAR (such as we are in SPL). Update the functions so that the caller can request that caches be left alone. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-08-20x86: coreboot: Add generic coreboot payload supportBin Meng2-15/+14
Currently building U-Boot as the coreboot payload requires user to change the build configuration for a specific board during menuconfig process. This uses the board's native device tree to configure the hardware. For example, the device tree provides PCI address range for the PCI host controller and U-Boot will re-program all PCI devices' BAR to be within this range. In order to make sure we don't mess up the hardware, we should guarantee the range matches what coreboot programs the chipset. But we really should make the coreboot payload support easier. Just like EFI payload, we can create a generic coreboot payload for all x86 boards as well. The payload is configured to include as many generic drivers as possible. All stuff that touches low level initialization are not allowed as such is the coreboot's responsibility. Platform specific drivers (like gpio, spi, etc) are not included. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-07-02x86: Add scsi command to coreboot and qemuBin Meng1-0/+1
This adds the scsi command to coreboot and qemu, to be in consistent with other x86 targets. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini6-13/+6
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-16x86: Rename e820entry to e820_entryBin Meng1-1/+1
This changes 'struct e820entry' to 'struct e820_entry' to conform with the coding style. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-04-16x86: Use 'unsigned int' in install_e820_map() functionsBin Meng1-3/+4
This fixes the following checkpatch warning: warning: Prefer 'unsigned int' to bare use of 'unsigned' Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-12-13ata: Migrate CONFIG_SCSI_AHCI to KconfigTuomas Tynkkynen1-0/+1
And use 'imply' liberally. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2017-08-16env: Convert CONFIG_ENV_IS_IN... to a choiceSimon Glass1-1/+0
At present we support multiple environment drivers but there is not way to select between them at run time. Also settings related to the position and size of the environment area are global (i.e. apply to all locations). Until these limitations are removed we cannot really support more than one environment location. Adjust the location to be a choice so that only one can be selected. By default the environment is 'nowhere', meaning that the environment exists only in memory and cannot be saved. Also expand the help for the 'nowhere' option and move it to the top since it is the default. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Move all of the imply logic to default X if Y so it works again] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-01x86: Switch all boards to use DM SCSIBin Meng1-0/+1
After MMC is converted to DM, convert to use DM SCSI as well for all x86 boards and imply BLK for both MMC and SCSI drivers. CONFIG_SCSI_DEV_LIST is no longer used. Clean them up. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Move USB to platform KconfigBin Meng1-0/+3
Like other peripheral drivers, move USB related drivers to platform Kconfig as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: coreboot: kconfig: Imply drivers that are usefulBin Meng1-0/+10
U-Boot as coreboot payload can run on any x86 hardware ideally. Let's imply some common drivers that are useful. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Select ARCH_MISC_INIT in the platform KconfigBin Meng1-5/+0
arch_misc_init() is intended to do architecture-dependent stuff. This is required by each platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Let board select BOARD_EARLY_INIT_FBin Meng1-5/+0
CONFIG_BOARD_EARLY_INIT_F literally indicates board-specific codes and should be not 'default y' for all x86 boards. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-30fs: Kconfig: Add a separate config for FS_CBFSSimon Glass1-0/+1
Rather than using CMD_CBFS for both the filesystem and its command, we should have a separate option for each. This allows us to enable CBFS support without the command, if desired, which reduces U-Boot's size slightly. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: imply FS_CBFS on SYS_COREBOOT] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-30fs: Convert CONFIG_CMD_CBFS to KconfigSimon Glass1-0/+1
This converts the following to Kconfig: CONFIG_CMD_CBFS Signed-off-by: Simon Glass <sjg@chromium.org> [trini: imply CMD_CBFS on SYS_COREBOOT] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-05board_f: Drop setup_dram_config() wrapperSimon Glass1-1/+3
By making dram_init_banksize() return an error code we can drop the wrapper. Adjust this and clean up all implementations. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
2017-04-05board_f: x86: Use checkcpu() for CPU initSimon Glass1-0/+5
At present we misuse print_cpuinfo() do so CPU init on x86. This is done because it is the next available call after the console is enabled. But several arches use checkcpu() instead. Despite the horrible name (which we can fix), it seems a better choice. Adjust the various x86 CPU implementations to move their init code into checkcpu() and use print_cpuinfo() only for printing CPU info. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
2016-10-12x86: coreboot: Convert to use DM coreboot video driverBin Meng1-4/+0
This converts coreboot to use DM framebuffer driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-06-29x86: coreboot: Remove the dummy pch driverBin Meng2-27/+0
There is a dummy pch driver in the coreboot directory. This causes drivers of its children fail to function due to empty ops. Remove the whole file since it is no longer needed. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-23x86: Call board_final_cleanup() in last_stage_init()Bin Meng1-9/+11
At present board_final_cleanup() is called before booting a Linux kernel. This actually needs to be done before booting anything, like SeaBIOS, VxWorks or Windows. Move the call to last_stage_init() instead. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-03-17x86: Move asm/arch-coreboot/tables.h to a common placeBin Meng2-2/+0
Move asm/arch-coreboot/tables.h to asm/coreboot_tables.h so that coreboot table definitions can be used by other x86 builds. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-01-24dm: x86: spi: Convert ICH SPI driver to driver model PCI APISimon Glass1-1/+2
At present this SPI driver works by searching the PCI buses for its peripheral. It also uses the legacy PCI API. In addition the driver has code to determine the type of Intel PCH that is used (version 7 or version 9). Now that we have proper PCH drivers we can use those to obtain the information we need. While the device tree has a node for the SPI peripheral it is not in the right place. It should be on the PCI bus as a sub-peripheral of the LPC device. Update the device tree files to show the SPI controller within the PCH, so that PCI access works as expected. This patch includes Bin's fix-up patch from here: https://patchwork.ozlabs.org/patch/569478/ Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2015-12-01x86: Convert to use driver model timerBin Meng1-22/+0
Convert all x86 boards to use driver model tsc timer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-09-09x86: coreboot: Convert to use more dm driversBin Meng1-6/+0
Move to driver model for RTC, USB and ETH on coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-08-26x86: coreboot: Allow >=4GiB memory bank sizeBin Meng1-5/+4
Some platforms may have >=4GiB memory, so we need make U-Boot report such configuration correctly when booting as the coreboot payload. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-26x86: Remove calculate_relocation_address()Bin Meng1-8/+1
Now that we have generic routine to calculate relocation address, remove the x86 specific one which is now only used by coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-26x86: coreboot: Correctly report E820 typesBin Meng1-2/+13
coreboot has some extensions (type 6 & 16) to the E820 types. When we detect this, mark it as E820_RESERVED. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-07-15x86: pci: Tidy up the generic x86 PCI driverSimon Glass1-22/+0
This driver should use the x86 PCI configuration functions. Also adjust its compatible string to something generic (i.e. without a vendor name). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
generated by cgit v1.2.3 (git 2.39.0) at 2026-09-30 03:11:31 +0300