summaryrefslogtreecommitdiff
path: root/arch/x86/cpu/coreboot
AgeCommit message (Expand)AuthorFilesLines
2015-06-04x86: qemu: Implement PIRQ routingBin Meng1-0/+5
2015-06-04x86: coreboot: Control I/O port 0xb2 writing via device treeBin Meng1-3/+9
2015-06-04x86: coreboot: Fix cosmetic issuesBin Meng1-24/+3
2015-04-30x86: link: Add PCH driver to support SPI FlashSimon Glass1-0/+11
2015-04-18dm: x86: pci: Convert coreboot to use driver model for pciSimon Glass1-47/+16
2015-04-17x86: Support machines with >4GB of RAMSimon Glass1-2/+4
2015-01-24x86: config: Enable hook for saving MRC configurationSimon Glass1-0/+5
2015-01-24x86: Use ipchecksum from net/Simon Glass3-60/+4
2015-01-13x86: coreboot: Configure pci memory regionsBin Meng1-2/+28
2015-01-13x86: coreboot: Move coreboot-specific defines from coreboot.h to KconfigBin Meng1-0/+15
2015-01-13x86: coreboot: Set up timer base correctlyBin Meng1-13/+20
2015-01-13x86: Add support for MTRRsSimon Glass1-12/+10
2014-12-08Replace <compiler.h> with <linux/compiler.h>Masahiro Yamada1-1/+2
2014-11-25x86: Remove board_early_init_r()Simon Glass1-11/+0
2014-11-24Merge git://git.denx.de/u-boot-x86Tom Rini5-59/+28
2014-11-23x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directoryMasahiro Yamada1-6/+6
2014-11-23linux/kernel.h: sync min, max, min3, max3 macros with LinuxMasahiro Yamada2-2/+2
2014-11-21x86: Make show_boot_progress() commonSimon Glass1-24/+0
2014-11-21x86: Tidy up coreboot header usageSimon Glass3-6/+6
2014-11-21x86: Refactor PCI to permit alternate initSimon Glass1-15/+7
2014-11-21x86: Emit post codes in startup code for ChromebooksSimon Glass1-1/+2
2014-11-21x86: Add chromebook_link boardSimon Glass1-0/+1
2014-11-21x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directoryMasahiro Yamada1-6/+6
2014-11-21x86: Replace fill_processor_name() with cpu_get_name()Simon Glass1-0/+5
2014-11-21x86: Fix up some missing prototypesSimon Glass2-5/+3
2014-11-21x86: Use the standard arch_cpu_init() functionSimon Glass1-6/+5
2014-11-21x86: Use the standard dram_init() functionSimon Glass1-7/+4
2014-03-28kbuild: move asm-offsets.c from SoC directory to arch/$(ARCH)/libMasahiro Yamada1-22/+0
2013-11-01x86: convert makefiles to Kbuild styleMasahiro Yamada1-28/+7
2013-10-15Coding Style cleanup: remove trailing white spaceWolfgang Denk2-2/+2
2013-08-19SPDX-License-Identifier: convert BSD-3-Clause filesWolfgang Denk1-22/+1
2013-08-03config: don't define CONFIG_ARCH_DEVICE_TREEStephen Warren1-7/+0
2013-07-24Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk7-106/+7
2013-05-14x86: Add coreboot timestampsSimon Glass1-0/+3
2013-05-14x86: Support adding coreboot timestanps to bootstageSimon Glass1-0/+38
2013-05-14x86: Add TSC timerSimon Glass1-1/+3
2013-05-14x86: Implement panic output for corebootSimon Glass1-0/+10
2013-04-16x86: Fix DRAM bank size init with generic boardSimon Glass1-1/+6
2013-03-16x86: Use sections header to obtain link symbolsSimon Glass1-0/+1
2013-03-05x86: Permit bootstage and timer data to be used prior to relocationSimon Glass1-9/+6
2013-03-05x86: Add function to get top of usable ramSimon Glass1-14/+4
2012-12-07x86: drop unused code in coreboot.cStefan Reinauer1-7/+0
2012-12-07x86: Remove coreboot_ from file nameStefan Reinauer2-2/+1
2012-12-07x86: Provide a way to throttle port80 accessesVadim Bendebury1-0/+21
2012-12-07x86: Issue SMI to finalize Coreboot in final stageDuncan Laurie1-0/+4
2012-12-07x86: Fix MTRR clear to detect which MTRR to useDuncan Laurie1-4/+15
2012-12-07x86: Emit port 80 post codes in show_boot_progress()Stefan Reinauer1-0/+2
2012-12-07x86: coreboot: Set CONFIG_ARCH_DEVICE_TREE correctlyGabe Black1-0/+23
2012-12-07x86: Override calculate_relocation_address to use the e820 mapGabe Black1-6/+55
2012-12-07x86: Ignore memory >4GB when parsing Coreboot tablesDuncan Laurie1-0/+4
generated by cgit v1.2.3 (git 2.39.0) at 2026-10-01 16:28:43 +0300