diff options
Diffstat (limited to 'arch/riscv/dts/dubhe70_fpga-u-boot.dtsi')
| -rw-r--r-- | arch/riscv/dts/dubhe70_fpga-u-boot.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/riscv/dts/dubhe70_fpga-u-boot.dtsi b/arch/riscv/dts/dubhe70_fpga-u-boot.dtsi index 6e069b5801..ef9bd75197 100644 --- a/arch/riscv/dts/dubhe70_fpga-u-boot.dtsi +++ b/arch/riscv/dts/dubhe70_fpga-u-boot.dtsi @@ -4,17 +4,17 @@ #include "dubhe_fpga_common-u-boot.dtsi" &cpu0 { - riscv,isa = "rv64imafdch_zba_zbb_zbc_zbs_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_sscofpmf_svinval_svnapot_svpbmt"; + riscv,isa = "rv64imafdch_zba_zbb_zbc_zbs_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_sscofpmf_svinval_svnapot"; }; &cpu1 { - riscv,isa = "rv64imafdch_zba_zbb_zbc_zbs_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_sscofpmf_svinval_svnapot_svpbmt"; + riscv,isa = "rv64imafdch_zba_zbb_zbc_zbs_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_sscofpmf_svinval_svnapot"; }; &cpu2 { - riscv,isa = "rv64imafdch_zba_zbb_zbc_zbs_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_sscofpmf_svinval_svnapot_svpbmt"; + riscv,isa = "rv64imafdch_zba_zbb_zbc_zbs_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_sscofpmf_svinval_svnapot"; }; &cpu3 { - riscv,isa = "rv64imafdch_zba_zbb_zbc_zbs_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_sscofpmf_svinval_svnapot_svpbmt"; + riscv,isa = "rv64imafdch_zba_zbb_zbc_zbs_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_sscofpmf_svinval_svnapot"; }; |