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| author | Yung-Ching LIN <yungching0725@gmail.com> | 2017-03-28 20:51:24 +0300 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2017-04-12 19:04:53 +0300 |
| commit | 0254006b29fcb960ef8c3188eab12a39845719f0 (patch) | |
| tree | 010fba28805385ab0c402b624bb1b651d20c38c8 /include/xilinx.h | |
| parent | fc9ade56e3eb451683a58089e32e79abb69e240e (diff) | |
| download | u-boot-0254006b29fcb960ef8c3188eab12a39845719f0.tar.xz | |
board: advantech: dms-ba16: fix AR8033 reset timing issue
Add the delay (10ms) to ensure the clock is stable and to meet the clock-to-reset(1ms) requirement recommended in the AR8033 datasheet
Signed-off-by: Ken Lin <yungching0725@gmail.com>
Acked-by: Akshay Bhat <akshay.bhat@timesys.com>
Diffstat (limited to 'include/xilinx.h')
0 files changed, 0 insertions, 0 deletions