armv8: lx2162aqds: Add support for LX2162AQDS platform

This patch add base support for LX2162AQDS board.
LX2162AQDS board supports LX2162A family SoCs.
This patch add basic support of platform.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: hui.song <hui.song_1@nxp.com>
Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Signed-off-by: Vikas Singh <vikas.singh@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>

4 files changed, 80 insertions, 124 deletions

diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index 0017ac5773..837760fe46 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -149,8 +149,10 @@
 /* USB */
 #ifdef CONFIG_USB
 #define CONFIG_HAS_FSL_XHCI_USB
+#ifndef CONFIG_TARGET_LX2162AQDS
 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
 #endif
+#endif
 
 /* FlexSPI */
 #ifdef CONFIG_NXP_FSPI
diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h
index 12884bcf2b..ea1b1635fe 100644
--- a/include/configs/lx2160aqds.h
+++ b/include/configs/lx2160aqds.h
@@ -8,70 +8,14 @@
 
 #include "lx2160a_common.h"
 
-/* Qixis */
-#define QIXIS_XMAP_MASK			0x07
-#define QIXIS_XMAP_SHIFT		5
-#define QIXIS_RST_CTL_RESET_EN		0x30
-#define QIXIS_LBMAP_DFLTBANK		0x00
-#define QIXIS_LBMAP_ALTBANK		0x20
-#define QIXIS_LBMAP_QSPI		0x00
-#define QIXIS_RCW_SRC_QSPI		0xff
-#define QIXIS_RST_CTL_RESET		0x31
-#define QIXIS_RCFG_CTL_RECONFIG_IDLE	0x20
-#define QIXIS_RCFG_CTL_RECONFIG_START	0x21
-#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	0x08
-#define QIXIS_LBMAP_MASK		0x0f
-#define QIXIS_LBMAP_SD
-#define QIXIS_LBMAP_EMMC
-#define QIXIS_RCW_SRC_SD		0x08
-#define QIXIS_RCW_SRC_EMMC         0x09
-#define NON_EXTENDED_DUTCFG
-#define QIXIS_SDID_MASK			0x07
-#define QIXIS_ESDHC_NO_ADAPTER		0x7
-
-/* SYSCLK */
-#define QIXIS_SYSCLK_100		0x0
-#define QIXIS_SYSCLK_125		0x1
-#define QIXIS_SYSCLK_133		0x2
-
-/* DDRCLK */
-#define QIXIS_DDRCLK_100		0x0
-#define QIXIS_DDRCLK_125		0x1
-#define QIXIS_DDRCLK_133		0x2
-
-#define BRDCFG4_EMI1SEL_MASK		0xF8
-#define BRDCFG4_EMI1SEL_SHIFT		3
-#define BRDCFG4_EMI2SEL_MASK		0x07
-#define BRDCFG4_EMI2SEL_SHIFT		0
-
 /* VID */
-
-#define I2C_MUX_CH_VOL_MONITOR		0xA
-/* Voltage monitor on channel 2*/
-#define I2C_VOL_MONITOR_ADDR		0x63
-#define I2C_VOL_MONITOR_BUS_V_OFFSET	0x2
-#define I2C_VOL_MONITOR_BUS_V_OVF	0x1
-#define I2C_VOL_MONITOR_BUS_V_SHIFT	3
 #define CONFIG_VID_FLS_ENV		"lx2160aqds_vdd_mv"
 #define CONFIG_VID
-
-/* The lowest and highest voltage allowed*/
-#define VDD_MV_MIN			775
-#define VDD_MV_MAX			925
-
-/* PM Bus commands code for LTC3882*/
-#define PMBUS_CMD_PAGE                  0x0
-#define PMBUS_CMD_READ_VOUT             0x8B
-#define PMBUS_CMD_PAGE_PLUS_WRITE       0x05
-#define PMBUS_CMD_VOUT_COMMAND          0x21
-#define PWM_CHANNEL0                    0x0
-
 #define CONFIG_VOL_MONITOR_LTC3882_SET
 #define CONFIG_VOL_MONITOR_LTC3882_READ
 
 /* RTC */
 #define CONFIG_SYS_RTC_BUS_NUM		0
-#define I2C_MUX_CH_RTC			0xB
 
 /*
  * MMC
@@ -87,25 +31,6 @@ u8 qixis_esdhc_detect_quirk(void);
 #if defined(CONFIG_FSL_MC_ENET)
 #define CONFIG_MII
 #define CONFIG_ETHPRIME		"DPMAC17@rgmii-id"
-
-#define AQ_PHY_ADDR1		0x00
-#define AQ_PHY_ADDR2		0x01
-#define AQ_PHY_ADDR3		0x02
-#define AQ_PHY_ADDR4		0x03
-
-#define CORTINA_PHY_ADDR1	0x0
-
-#define INPHI_PHY_ADDR1		0x0
-#define INPHI_PHY_ADDR2		0x1
-
-#define RGMII_PHY_ADDR1		0x01
-#define RGMII_PHY_ADDR2		0x02
-
-#define SGMII_CARD_PORT1_PHY_ADDR 0x1C
-#define SGMII_CARD_PORT2_PHY_ADDR 0x1D
-#define SGMII_CARD_PORT3_PHY_ADDR 0x1E
-#define SGMII_CARD_PORT4_PHY_ADDR 0x1F
-
 #endif
 
 /* EEPROM */
diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h
index 59c2305a34..097f1224c9 100644
--- a/include/configs/lx2160ardb.h
+++ b/include/configs/lx2160ardb.h
@@ -8,47 +8,9 @@
 
 #include "lx2160a_common.h"
 
-/* Qixis */
-#define QIXIS_XMAP_MASK			0x07
-#define QIXIS_XMAP_SHIFT		5
-#define QIXIS_RST_CTL_RESET_EN		0x30
-#define QIXIS_LBMAP_DFLTBANK		0x00
-#define QIXIS_LBMAP_ALTBANK		0x20
-#define QIXIS_LBMAP_QSPI		0x00
-#define QIXIS_RCW_SRC_QSPI		0xff
-#define QIXIS_RST_CTL_RESET		0x31
-#define QIXIS_RCFG_CTL_RECONFIG_IDLE	0x20
-#define QIXIS_RCFG_CTL_RECONFIG_START	0x21
-#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	0x08
-#define QIXIS_LBMAP_MASK		0x0f
-#define QIXIS_LBMAP_SD
-#define QIXIS_LBMAP_EMMC
-#define QIXIS_RCW_SRC_SD           0x08
-#define QIXIS_RCW_SRC_EMMC         0x09
-#define NON_EXTENDED_DUTCFG
-
 /* VID */
-
-#define I2C_MUX_CH_VOL_MONITOR		0xA
-/* Voltage monitor on channel 2*/
-#define I2C_VOL_MONITOR_ADDR		0x63
-#define I2C_VOL_MONITOR_BUS_V_OFFSET	0x2
-#define I2C_VOL_MONITOR_BUS_V_OVF	0x1
-#define I2C_VOL_MONITOR_BUS_V_SHIFT	3
 #define CONFIG_VID_FLS_ENV		"lx2160ardb_vdd_mv"
 #define CONFIG_VID
-
-/* The lowest and highest voltage allowed*/
-#define VDD_MV_MIN			775
-#define VDD_MV_MAX			855
-
-/* PM Bus commands code for LTC3882*/
-#define PMBUS_CMD_PAGE                  0x0
-#define PMBUS_CMD_READ_VOUT             0x8B
-#define PMBUS_CMD_PAGE_PLUS_WRITE       0x05
-#define PMBUS_CMD_VOUT_COMMAND          0x21
-#define PWM_CHANNEL0                    0x0
-
 #define CONFIG_VOL_MONITOR_LTC3882_SET
 #define CONFIG_VOL_MONITOR_LTC3882_READ
 
@@ -59,17 +21,6 @@
 #if defined(CONFIG_FSL_MC_ENET)
 #define CONFIG_MII
 #define CONFIG_ETHPRIME		"DPMAC1@xgmii"
-
-#define AQR107_PHY_ADDR1	0x04
-#define AQR107_PHY_ADDR2	0x05
-#define AQR107_IRQ_MASK		0x0C
-
-#define CORTINA_PHY_ADDR1	0x0
-#define INPHI_PHY_ADDR1		0x0
-
-#define RGMII_PHY_ADDR1		0x01
-#define RGMII_PHY_ADDR2		0x02
-
 #endif
 
 /* EMC2305 */
diff --git a/include/configs/lx2162aqds.h b/include/configs/lx2162aqds.h
new file mode 100644
index 0000000000..847534c550
--- /dev/null
+++ b/include/configs/lx2162aqds.h
@@ -0,0 +1,78 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 NXP
+ */
+
+#ifndef __LX2162_QDS_H
+#define __LX2162_QDS_H
+
+#include "lx2160a_common.h"
+
+/* USB */
+#undef CONFIG_USB_MAX_CONTROLLER_COUNT
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+
+/* Voltage monitor on channel 2*/
+#define CONFIG_VID_FLS_ENV		"lx2162aqds_vdd_mv"
+#define CONFIG_VID
+#define CONFIG_VOL_MONITOR_LTC3882_SET
+#define CONFIG_VOL_MONITOR_LTC3882_READ
+
+/* RTC */
+#define CONFIG_SYS_RTC_BUS_NUM		0
+
+/*
+ * MMC
+ */
+#ifdef CONFIG_MMC
+#ifndef __ASSEMBLY__
+u8 qixis_esdhc_detect_quirk(void);
+#endif
+#define CONFIG_ESDHC_DETECT_QUIRK  qixis_esdhc_detect_quirk()
+#endif
+
+/* MAC/PHY configuration */
+#if defined(CONFIG_FSL_MC_ENET)
+#define CONFIG_MII
+#define CONFIG_ETHPRIME		"DPMAC17@rgmii-id"
+#endif
+
+/* EEPROM */
+#define CONFIG_ID_EEPROM
+#define CONFIG_SYS_I2C_EEPROM_NXID
+#define CONFIG_SYS_EEPROM_BUS_NUM		0
+#define CONFIG_SYS_I2C_EEPROM_ADDR		0x57
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
+
+/* Initial environment variables */
+#define CONFIG_EXTRA_ENV_SETTINGS		\
+	EXTRA_ENV_SETTINGS			\
+	"boot_scripts=lx2162aqds_boot.scr\0"	\
+	"boot_script_hdr=hdr_lx2162aqds_bs.out\0"	\
+	"BOARD=lx2162aqds\0"			\
+	"xspi_bootcmd=echo Trying load from flexspi..;"		\
+		"sf probe 0:0 && sf read $load_addr "		\
+		"$kernel_start $kernel_size ; env exists secureboot &&"	\
+		"sf read $kernelheader_addr_r $kernelheader_start "	\
+		"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
+		" bootm $load_addr#$BOARD\0"			\
+	"sd_bootcmd=echo Trying load from sd card..;"		\
+		"mmc dev 0; mmcinfo; mmc read $load_addr "			\
+		"$kernel_addr_sd $kernel_size_sd ;"		\
+		"env exists secureboot && mmc read $kernelheader_addr_r "\
+		"$kernelhdr_addr_sd $kernelhdr_size_sd "	\
+		" && esbc_validate ${kernelheader_addr_r};"	\
+		"bootm $load_addr#$BOARD\0"			\
+	"emmc_bootcmd=echo Trying load from emmc card..;"	\
+		"mmc dev 1; mmcinfo; mmc read $load_addr "	\
+		"$kernel_addr_sd $kernel_size_sd ;"		\
+		"env exists secureboot && mmc read $kernelheader_addr_r "\
+		"$kernelhdr_addr_sd $kernelhdr_size_sd "	\
+		" && esbc_validate ${kernelheader_addr_r};"	\
+		"bootm $load_addr#$BOARD\0"
+
+#include <asm/fsl_secure_boot.h>
+
+#endif /* __LX2162_QDS_H */