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| author | Chris Packham <chris.packham@alliedtelesis.co.nz> | 2018-05-10 04:28:31 +0300 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2018-05-14 11:01:56 +0300 |
| commit | db363dbce705d3092f05a622ddea1d007ececca6 (patch) | |
| tree | b0d9f3961c8b1fe3fefe9a355ee45e6169db35a4 /drivers/ddr/marvell/a38x/mv_ddr_plat.h | |
| parent | e6f61622d32327907f824154c7f88ddce3c700cc (diff) | |
| download | u-boot-db363dbce705d3092f05a622ddea1d007ececca6.tar.xz | |
ARM: mvebu: a38x: use non-zero size for ddr scrubbing
Make ddr3_calc_mem_cs_size() global scope and use it in
ddr3_new_tip_ecc_scrub to correctly initialize all of DDR memory.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/ddr/marvell/a38x/mv_ddr_plat.h')
| -rw-r--r-- | drivers/ddr/marvell/a38x/mv_ddr_plat.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/ddr/marvell/a38x/mv_ddr_plat.h b/drivers/ddr/marvell/a38x/mv_ddr_plat.h index 61f10302fc..9c5fdecd93 100644 --- a/drivers/ddr/marvell/a38x/mv_ddr_plat.h +++ b/drivers/ddr/marvell/a38x/mv_ddr_plat.h @@ -232,4 +232,5 @@ u32 mv_ddr_dm_pad_get(void); int mv_ddr_pre_training_fixup(void); int mv_ddr_post_training_fixup(void); int mv_ddr_manual_cal_do(void); +int ddr3_calc_mem_cs_size(u32 cs, uint64_t *cs_size); #endif /* _MV_DDR_PLAT_H */ |