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2024-12-24lib: utils: Fix irqchip registration for PLIC and APLICAnup Patel1-6/+2
Currently, the same irqchip instance is registered for multiple PLIC and APLIC instances which causes the sbi_list_for_each_entry() loop in the sbi_irqchip_init() to hang at boot-time. To address the above issue, register a separate irqchip instance for each PLIC and APLIC instance. Fixes: 2dd6eaf68055 ("lib: sbi_irqchip: Call driver warm_init from SBI core") Reported-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
2024-11-28lib: sbi_irqchip: Call driver warm_init from SBI coreSamuel Holland1-1/+2
Currently, each platform keeps track of which irqchip driver is in use and calls its warm init function. Since the generic platform may use multiple irqchip drivers, it has logic to track an array of drivers. The code is simplified and made common across platforms by treating warm init and exit as properties of the driver, not the platform. Then the platform's only role is to select and prepare a driver during cold boot. For now, only add a .warm_init hook, since none of the existing drivers need an .exit hook. It could be added in the future if needed. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28lib: sbi_irqchip: Register devices during cold initSamuel Holland1-0/+7
Have the SBI irqchip core keep track of registered irqchip devices. This is useful for any callbacks the irqchip driver may have, such as for warm initialization, the external interrupt handler function, and any future support for handling external interrupts (beyond IPIs) in M-mode. This improves on the tracking done in fdt_irqchip.c, as it tracks device instances, not just drivers, so callbacks can target a specific device. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28lib: utils/irqchip: Move per-hart data from fdt_plic to plicSamuel Holland1-5/+44
The per-hart PLIC pointer is not really specific to FDT platforms. Move it into the main driver and drop the extra wrapper functions. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28lib: utils/irqchip: plic: Common PM save/restoreSamuel Holland1-46/+88
Move the PLIC save/restore functions inside the driver, so they can be reused on any platform that needs them. The memory needed to store the PLIC context is also allocated by the driver. The PM data cannot be completely encapsulated, as some platforms (including Allwinner D1) need to program the IRQ enable status to a sideband interrupt controller for wakeup capability. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28lib: utils/irqchip: plic: Provide a hartindex to context mapSamuel Holland1-4/+10
This removes platform-specific arguments to plic_warm_irqchip_init(), which makes the driver independent from the platform after cold init, and allows for further refactoring. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28lib: utils/irqchip: plic: Move delegation to base PLIC driverSamuel Holland1-0/+11
This needs to be in the base PLIC driver as part of the power management save/restore flow. This is also in preparation for moving the PLIC information in the scratch area to the base PLIC driver. After that change, the FDT PLIC layer will be unable to look up the `struct plic_data` after cold boot. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28lib: utils/irqchip: plic: Allow enabling IRQs by defaultSamuel Holland1-6/+11
Unlike other platforms, Ariane and OpenPiton enable all IRQs by default. This was described in commit b44e844880d0 ("Add support for Ariane FPGA SoC") as "due to some issue of the design." Add this workaround behind a flag in plic_warm_irqchip_init(), so every platform can use the same warm init function. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-12-19lib: utils/irqchip: Add shared MMIO region for PLIC in root domainAnup Patel1-1/+5
On platforms with Smepmp, the MMIO regions accessed by M-mode need to be explicitly marked with M-mode only read/write or shared (both (M-mode and S-mode) read/write permission. If the above is not done then runtime PLIC access from M-mode on platforms with Smepmp will result in access fault when further results in CPU hotplug not working. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2022-12-17lib: utils/irqchip: plic: Ensure no out-of-bound access in context ↵Bin Meng1-4/+10
save/restore helpers Currently the context save/restore helpers writes/reads the provided array using an index whose maximum value is determined by PLIC, which potentially may disagree with the caller to these helpers. Add a parameter to ask the caller to provide the size limit of the array to ensure no out-of-bound access happens. Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-17lib: utils/irqchip: plic: Fix the off-by-one error in context save/restore ↵Bin Meng1-2/+2
helpers plic->num_src holds the number of interrupt sources without interrupt source 0 but the interrupt enable register includes a bit for the interrupt source 0 in the first word. Fixes: 415ecf28f7ad ("lib: irqchip/plic: Add context save/restore helpers") Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Samuel Holland <samuel@sholland.org>
2022-12-17lib: utils/irqchip: plic: Fix the off-by-one error in plic_context_init()Bin Meng1-1/+1
The number of interrupt enable register in words was once correct, but was wrongly changed to have an off-by-one error since commit 8c362e7d065e ("lib: irqchip/plic: Factor out a context init function"). Fixes: 8c362e7d065e ("lib: irqchip/plic: Factor out a context init function") Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Samuel Holland <samuel@sholland.org>
2022-12-17lib: utils/irqchip: plic: Ensure no out-of-bound access in priority ↵Bin Meng1-4/+5
save/restore helpers Currently the priority save/restore helpers writes/reads the provided array using an index whose maximum value is determined by PLIC, which potentially may disagree with the caller to these helpers. Add a parameter to ask the caller to provide the size limit of the array to ensure no out-of-bound access happens. Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-17lib: utils/irqchip: plic: Fix the off-by-one error in priority save/restore ↵Bin Meng1-2/+2
helpers Interrupt source 0 is reserved. Hence the irq should start from 1. Fixes: 2b79b694a805 ("lib: irqchip/plic: Add priority save/restore helpers") Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-06-22lib: irqchip/plic: fix typo in plic_warm_irqchip_initJan Remes1-1/+1
The second invocation of plic_context_init() incorrectly calls the function with m_cntx_id instead of s_cntx_id. This breaks systems which only have 1 external interrupt per hart. Fixes: 8c362e7 ("lib: irqchip/plic: Factor out a context init function") Signed-off-by: Jan Remes <jan.remes@codasip.com> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Samuel Holland <samuel@sholland.org>
2022-06-13lib: irqchip/plic: Add priority save/restore helpersSamuel Holland1-0/+19
These can be used by platform code to save the PLIC priority state, if it would otherwise be lost during non-retentive suspend. The platform is responsible for allocating all necessary storage. As a space optimization, store the saved priority values as 8-bit integers, since that is large enough to hold any priority value on the relevant platforms. Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-06-13lib: irqchip/plic: Add context save/restore helpersSamuel Holland1-3/+48
These can be used by platform code to save the PLIC context state, if it would otherwise be lost during non-retentive suspend. The platform is responsible for allocating all necessary storage. Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-06-13lib: irqchip/plic: Factor out a context init functionSamuel Holland1-26/+29
This simplifies both the callers and the callees by removing duplicated code and consolidating the error handling. It also fixes two bugs in the process: 1) ie_words was one too large when plic->num_src was a multiple of 32. 2) plic_set_ie takes a 32-bit mask, not a Boolean value, so the FPGA platforms previously only enabled one out of every 32 interrupts. Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-06-13lib: irqchip/plic: Constify plic_data pointersSamuel Holland1-5/+6
None of the functions modify the passed-in plic_data, so mark it const. Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-01-21lib: fix pointer of type 'void *' used in arithmeticJukka Laitinen1-4/+4
Using "void *" in arithmetic causes errors with strict compiler settings: "error: pointer of type 'void *' used in arithmetic [-Werror=pointer-arith]" Avoid these by calculating on "char *" where 1-byte data size is assumed. Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae> Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2020-05-23lib: utils: Allow PLIC functions to be used for multiple PLICsAnup Patel1-23/+37
We extend all PLIC functions to have a "struct plic_data *" parameter pointing to PLIC details. This allows platforms to use these functions for multiple PLIC instances. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-23lib: utils: Remove redundant parameters from PLIC init functionsAnup Patel1-7/+2
The "target_hart" and "hart_count" parameters of PLIC cold and warm init functions are only used for sanity checks and not required in PLIC initialization. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-04-06lib: irqchip/plic: Fix maximum priority threshold valueAtish Patra1-2/+2
As per the PLIC specification, maximum priority threshold value is 0x7. Even though, writing a higher value doesn't cause any error in qemu hifive unleashed, there may be some implementation which checks the upper and may result in an illegal access. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-03-18lib: utils: Move PLIC DT fix up codes to fdt_helper.cBin Meng1-27/+0
Now that we have a dedicated fdt_helper.c file for DT releated helper routines, move plic_fdt_fixup() codes from plic.c to fdt_helper.c and rename it to fdt_plic_fixup() at the same time, to keep name consistency in the same file. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-02-13lib: irqchip/plic: Disable all contexts and IRQsAtish Patra1-4/+4
To initialize PLIC in sane state, we should: 1. set maximum threshold value of M-mode PLIC contexts 2. set maximum threshold value of S-mode PLIC contexts 3. set irq priorities to miniumum Fix the comment and initialize the threshold/priorities correctly. Signed-off-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Atish Patra <atish.patra@wdc.com>
2019-08-12lib: Use correct type for return valueJacob Garber1-1/+1
The error check 'plic_off < 0' does nothing, since plic_off is stored as a u32. Fix this by changing it to an int, which matches the return type of fdt_node_offset_by_compatible(). Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2019-07-25utils: Use cpu_to_fdt32() when writing to fdtGeorg Kotheimer1-1/+1
Although it does not make a functional difference, both cpu_to_fdt32() and fdt32_to_cpu() pass on to CPU_TO_FDT32, we should use cpu_to_fdt32() to be semantically correct. Signed-off-by: Georg Kotheimer <georg.kotheimer@kernkonzept.com> Reviewed-by: Atish Patra <atish.patra@wdc.com> Acked-by: Anup Patel <anup.patel@wdc.com>
2019-06-29Changed plic_set_thresh() and plic_set_ie() to publicPanagiotis Peristerakis1-2/+2
Signed-off-by: Panagiotis Peristerakis <perister@ics.forth.gr>
2019-06-19utils: Remove tinyfdt.cAtish Patra1-16/+14
tinyfdt.c was originally added to provide a minimal implementation of fdt parsing. However, we have already included libfdt in OpenSBI for more complicated operations. Remove tinfdt and replace its functiolity using libfdt. Signed-off-by: Atish Patra <atish.patra@wdc.com> Acked-by: Anup Patel <anup.patel@wdc.com>
2019-06-19lib: Rename string.x to sbi_string.xAtish Patra1-2/+2
All string functions are part of libsbi. It makes more sense to rename them to sbi_string.x as the libsbi can be linked with external libraries that can have similar implementation. Signed-off-by: Atish Patra <atish.patra@wdc.com> Acked-by: Anup Patel <anup.patel@wdc.com>
2019-06-19platform: Move platform common to lib/utils.Atish Patra1-0/+120
Currently, platform/common contains platform/non-platform specific common minimal drivers and libraries. This is helpful is all platforms are built within opensbi framework. Move them to lib/utils so that any external platform code also can reuse the minimalistic drivers or other common libraries. This patch doesn't introduce any functional changes. Signed-off-by: Atish Patra <atish.patra@wdc.com> Acked-by: Anup Patel <anup.patel@wdc.com>