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2025-02-19lib: sbi: fwft: Return SBI_ERR_DENIED_LOCKED when setting a locked featureHEADmasterClément Léger1-1/+1
Latest modifications to the spec mandates that a set on a lock feature returns SBI_ERR_DENIED_LOCKED. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2025-02-19lib: sbi: sse: fix invalid errors returned for sse_hart_mask/unmask()Clément Léger1-2/+2
When called twice, sse_hart_mask()/sse_hart_unmask() should return SBI_EALREADY_STOPPED/SBI_EALREADY_STARTED. This was currently inverted. Fixes: b919daf49582 ("lib: sbi: Add support to mask/unmask SSE events") Reported-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2025-02-19lib: sbi: Fix non-root domain startupAnup Patel2-12/+38
Currently, the sbi_sse_init() in cold boot path is called after sbi_domain_finalize() so boot HART of non-root domains will start before SSE cold boot init which can cause warm boot of such HARTs to crash in sbi_sse_init(). To address the above issue, factor-out the non-root domain startup from sbi_domain_finalize() function as a separate sbi_domain_startup() function which can be called after sbi_sse_init() in cold boot path. Fixes: 93f7d819fdeb ("lib: sbi: sse: allow adding new events") Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2025-02-13lib: sbi: Update MPXY framework and SBI extension as per latest specAnup Patel2-29/+40
The latest SBI 3.0 spec defines a new sbi_mpxy_get_shmem_size() function and simplifies sbi_mpxy_set_shmem() function so update the MPXY framework and SBI extension accordingly. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2025-02-13lib: sbi: Improve local variable declarations in MPXY frameworkAnup Patel1-40/+25
The local variable declarations should be at the start of function and preferrably organized like a inverted pyramid. Signed-off-by: Anup patel <apatel@ventanamicro.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2025-02-13lib: sbi: Fix capability bit assignment in MPXY frameworkAnup Patel1-6/+6
The capability bit assignment in MPXY framework does not match the SBI MPXY extension in latest SBI specification so update it. Fixes: 7939bf1329eb ("lib: sbi: Add SBI Message Proxy (MPXY) framework") Signed-off-by: Anup patel <apatel@ventanamicro.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2025-02-13lib: sbi: increase the size of the string used for extension displayClément Léger1-1/+1
With the "max" QEMU cpu, the displayed extension string is truncated due to the buffer being too small. Increase it to 256 to display the full set of extensions correctly. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2025-01-30lib: sbi: pmu: add the PMU SSE event only if overflow IRQ is supportedClément Léger1-1/+2
Add the PMU SSE event only if an overflow irq bit is present. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Atish Patra <atishp@rivosinc.com>
2025-01-30lib: sbi: sse: return SBI_ENOTSUPP for unsupported eventsClément Léger1-0/+30
If a standard event was not found in the list of events that are handled by harts but belongs to the standard event list defined by the specification, return SBI_ENOTSUPP. Without that, we can not distinguish a non implemented standard event from a non valid one. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Atish Patra <atishp@rivosinc.com>
2025-01-30lib: sbi: sse: allow adding new eventsClément Léger4-55/+102
In order to allow events to be dynamically added, remove the existing static array of events and use a simply linked list of supported events. This allows us to move the cb_ops into this list and associated it with an event_id. Drivers can now register cb_ops before bringing up the sse core to handle additional events (platform ones for instance). sbi_sse_init() now allocates as many events as present in the linked list. Events can now be added with sbi_sse_add_event() which allows to add new supported events with some callback operations if any. If an event is not to be supported, then sbi_sse_add_event() should not be called. This approach currently consider that local events are to be supported on all harts (ie, they all support the same ISA or dependencies). If per-hart event availability needs to be supported, then, an is_supported() callback could be added later and called for each hart. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2025-01-30lib: sbi: sse: return an error value from sse_event_get()Clément Léger1-34/+38
Since event support will be checked in the next commits, return a value from sse_event_get() to allow propagating it. This will be used to report SBI_ERR_NOT_SUPPORTED when an event isn't supported. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Atish Patra <atishp@rivosinc.com>
2025-01-30lib: sbi: move sbi_double_trap_handler() to a dedicated headerClément Léger1-0/+1
We will add new functions to sbi_double_trap.c in order to register an SSE event, split this to a header as part of preparation work. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2025-01-30lib: sbi: pmu: fix usage of sbi_pmu_irq_bit()Clément Léger3-22/+37
While sbi_pmu_irq_bit() was used to delegate irq to S-mode, LCOFIP usage was still hardcoded in various places. This led to change the returned value of sbi_pmu_irq_bit() to be a bit number rather than a bit mask since it returns an 'int' and we need to obtain the bit number itself to handle it in the IRQs handlers. Add a similar function to return the irq mask which can also be used where the mask is required rather than the bit itself. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Atish Patra <atishp@rivosinc.com>
2024-12-24lib: sbi: Improve the alignment of boot-time printsAnup Patel1-31/+31
Addition of "Experimental SBI Extensions" to the boot-time prints disturbs the alignment of other prints so adjust all boot-time prints accordingly. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-22lib: sbi: Print list of available SBI extensions at boot-timeAnup Patel18-9/+57
Add boot-time prints for list of available standard and experimental SBI extensions. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-15lib: sbi_pmu: Verify the raw events first during event infoAtish Patra1-7/+6
The raw events have same event_idx. Thus, the event info sanity check only relies on the select mask. The raw event check should be done first so that regular hardware events can be verified using event idx range check. Fixes: e4345842168b ("lib: sbi_pmu: Implement SBI PMU event info function") Signed-off-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-12-15lib: sbi_pmu: Fix the sanity check condition for hw event mapAtish Patra1-2/+2
The hardware event map function invoked from platform code should exclude any raw events as there is a separate function for the raw events. Fixes: d8a483fc7fd0 ("lib: sbi_pmu: PMU raw event v2 support") Signed-off-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-12-15lib: sbi: sse: Fix a6 and a7 register content upon injectionClément Léger1-2/+2
The specification states that a6 contains the current hart id and a7 contains the entry argument. This was inverted in the current implementation. Reported-by: Andrew Jones <andrew.jones@linux.dev> Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-12-15Makefile: Don't enable V-extension using -march optionAnup Patel1-2/+3
Enabling V-extension using -march option causes OpenSBI boot-time hang with LLVM compiler. As a work-around, don't enable V-extension using -march option and instead use a custom OpenSBI specific define inform availability of V-extension to lib/sbi/sbi_trap_v_ldst.c. Fixes: c2acc5e5b0d8 ("lib: sbi_misaligned_ldst: Add handling of vector load/store") Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-12-06lib: sbi_misaligned_ldst: Add handling of vector load/storeNylon Chen3-8/+359
Add misaligned load/store handling for the vector extension to the sbi_misaligned_ldst library. This implementation is inspired from the misaligned_vec_ldst implementation in the riscv-pk project. Co-developed-by: Zong Li <zong.li@sifive.com> Signed-off-by: Zong Li <zong.li@sifive.com> Signed-off-by: Nylon Chen <nylon.chen@sifive.com> Reviewed-by: Andy Chiu <andy.chiu@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-12-06lib: sbi: Implement SBI MPXY extensionAnup Patel3-0/+74
Implement the SBI MPXY extension which provides an SBI interface to the supervisor software for send messages via MPXY framework. Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> Co-developed-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-06lib: sbi: Add SBI Message Proxy (MPXY) frameworkRahul Pathak3-0/+705
Introduce SBI Message Proxy (MPXY) framework which allows platform specific code or drivers to register message protocol specific channels. This framework enables the supervisor software to send messages belonging to different message protocols via OpenSBI firmware. Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> Co-developed-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Co-developed-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-06lib: sbi: Add optional resume address to hart suspendSubrahmanya Lingappa1-3/+3
Add an optional resume address to the platform specific hart suspend call. Signed-off-by: Subrahmanya Lingappa <slingappa@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-06lib: Increase ROOT_REGION_MAX to accomodate more memregionsRahul Pathak1-1/+1
As more drivers adding memregions into root domain, the current static limit of ROOT_REGION_MAX is not sufficient. Increase the limit to accomodate more memregions. Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-02lib: sbi_pmu: Implement SBI PMU event info functionAtish Patra2-0/+79
Allow the supervisor software to query about the event using the new function. This supports both firmware and hardware events. The hardware event presence is verified hw_event_map which is populated via PMU device tree node. The firmware event presence is checked through event validation function which should take care of both standard and platform firmware events. Signed-off-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-12-02lib: sbi_pmu: Remove redundant check for fw eventsAtish Patra1-5/+0
The pmu_validate_event already has the same check for fw events. The validate function is called prior to the current function to find a counter for firmware. That's why, the redudant check can be removed from the find counter function. Signed-off-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-12-02lib: sbi_pmu: PMU raw event v2 supportAtish Patra1-5/+8
As per the updated ISA specification and SBI PMU v3.0, lower 56 bits are available for the platform to implement mhpmeventX encoding. Implement the PMU raw event V2 support defined in SBI v3.0 which allows more bits for platforms to encode the raw events. Signed-off-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28treewide: Make carray arrays const and NULL-terminatedSamuel Holland2-6/+4
This allows the compiler to generate significantly better code, because it does not have to maintain either the loop counter or loop limit. Plus there are half as many symbols to relocate. This also simplifies passing carray arrays to helper functions. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28sbi: fwft: clear the config lock when warm bootNick Hu1-0/+15
The hotplug cpu should clear the fwft config's SBI_FWFT_SET_FLAG_LOCK in the warm boot flow otherwise the cpu can't set the menvcfg.sse by SBI_EXT_FWFT_SET sbi call and cause the illegal instruction when accessing the CSR_SSP in kernel. Signed-off-by: Nick Hu <nick.hu@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28lib: sbi_irqchip: Set the IRQ handler when registering a chipSamuel Holland1-6/+3
In addition to saving some code size, this moves the decision about setting the top-level external interrupt handler to the irqchip core, not the specific driver, which would be needed to support chained interrupt handlers. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28platform: Drop irqchip warm init and exit hooksSamuel Holland1-7/+5
Now that driver lifecycle is managed from within the SBI irqchip core, platforms need only to initialize the driver once during cold init. Remove the remaining platform hooks that are no longer used. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28lib: sbi_irqchip: Call driver warm_init from SBI coreSamuel Holland1-0/+9
Currently, each platform keeps track of which irqchip driver is in use and calls its warm init function. Since the generic platform may use multiple irqchip drivers, it has logic to track an array of drivers. The code is simplified and made common across platforms by treating warm init and exit as properties of the driver, not the platform. Then the platform's only role is to select and prepare a driver during cold boot. For now, only add a .warm_init hook, since none of the existing drivers need an .exit hook. It could be added in the future if needed. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28lib: sbi_irqchip: Register devices during cold initSamuel Holland1-0/+8
Have the SBI irqchip core keep track of registered irqchip devices. This is useful for any callbacks the irqchip driver may have, such as for warm initialization, the external interrupt handler function, and any future support for handling external interrupts (beyond IPIs) in M-mode. This improves on the tracking done in fdt_irqchip.c, as it tracks device instances, not just drivers, so callbacks can target a specific device. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-11platform: Drop IPI warm init and exit hooksSamuel Holland1-8/+5
Now that the SBI IPI core clears IPIs at warm boot in a generic way, none of the drivers or platforms use these hooks, and we can remove them. Platforms need only to initialize the driver once during cold init. If other hooks are needed in the future, they can be added to struct sbi_ipi_device. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-11lib: sbi_ipi: Move initial IPI clear to sbi_ipi_init()Samuel Holland2-5/+5
sbi_ipi_init() expects the platform warm init function to clear IPIs on the local hart, but there is already a generic function to do this. After this change, none of the existing drivers need a warm init callback. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-11lib: sbi_ipi: Make .ipi_clear always target the current hartSamuel Holland2-5/+4
All existing users of this operation target the current hart, and it seems unlikely that a future user will need to clear the pending IPI status of a remote hart. Simplify the logic by changing .ipi_clear (and its wrapper sbi_ipi_raw_clear()) to always operate on the current hart. This incidentally fixes a bug introduced in commit 78c667b6fc07 ("lib: sbi: Prefer hartindex over hartid in IPI framework"), which changed the .ipi_clear parameter from a hartid to a hart index, but failed to update the warm_init functions to match. Fixes: 78c667b6fc07 ("lib: sbi: Prefer hartindex over hartid in IPI framework") Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-05platform: Drop timer warm init and exit hooksSamuel Holland1-6/+4
Now that driver lifecycle is managed from within the SBI timer core, platforms need only to initialize the driver once during cold init. Remove the remaining platform hooks that are no longer used. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-05lib: sbi_timer: Call driver warm_init from SBI coreSamuel Holland1-1/+12
Currently, the platform's timer device is tracked in two places: the core SBI implementation has `timer_dev`, and the FDT timer layer has `current_driver`. The latter is used for warm initialization of the timer device. However, this warm init is not specific to FDT-based platforms; other platforms call exactly the same functions from the same point in the boot sequence. The code is simplified and made common across platforms by treating warm init and exit as properties of the driver, not the platform. Then the platform's only role is to select and prepare a driver during cold boot. For now, only add a .warm_init hook, since none of the existing drivers need an .exit hook. It could be added in the future if needed. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-10-28lib: sbi: fix number of PMP entries detectionVladimir Kondratiev1-1/+1
CSR_PMPADDRn lower bits may read all-0 or all-1, depending on the configuration. For TOR it is all-0, for NAPOT - all-1. Thus if PMP entry was pre-configured as NAPOT, original code would stop scanning because value read back not equal to the written one. Mask lower bits before comparison to fix this Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-10-25lib: sbi: implement firmware feature SBI_FWFT_DOUBLE_TRAPClément Léger1-0/+25
Add support for double trap firmware feature. Link: https://lists.riscv.org/g/tech-prs/message/985 [1] Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-10-25lib: sbi: fwft: factorize menvcfg read/writeClément Léger1-54/+40
MENVCFG access will be used as well for double trap, landing pad and shadow stack fwft support. Factorize that in a common function. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-10-25lib: sbi: send a double trap SSE event to supervisorClément Léger2-1/+2
In case the double trap handler is called and the double trap happened in supervisor mode, send a double trap SSE event. NOTE: this commit depends on the ratification of the new SSE event id for double trap [1]. Link: https://lists.riscv.org/g/tech-prs/message/985 [1] Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-10-25lib: sbi: add Ssdbltrp ISA extension supportClément Léger4-0/+39
Add Ssdbltrp trap handler support for S-mode double trap handling. If the trap is received while in VS-mode, then the trap is redirected to S-mode. If caught while in HS-mode, then an error is returned to the top trap handler which will panic. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-10-25lib: sbi: factorize previous mode computationClément Léger5-8/+8
Previous privilege mode retrieval from mstatus is done at different places, factorize it rather than copy/pasting it again. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-10-25lib: sbi: factorize previous virtualization mode read from regsClément Léger2-15/+3
The same pattern is used at multiple places to verify in which mode the exception was actually taken. Factorize it. Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-10-25lib: sbi: Add support to mask/unmask SSE eventsHimanshu Chauhan2-0/+49
Add functions to globally mask/unmask supervisor software events on the calling hart. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-10-25lib: sbi_domain: Use domain data support for per-domain hart contextAnup Patel2-14/+99
The per-domain hartindex_to_context_table[] is yet another per-domain data required for implementing hart entry into (or exit from) domain. Use the recently added domain data support for per-domain hart context so that a dedicated hartindex_to_context_table[] in struct sbi_domain is not needed. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
2024-10-25lib: sbi: Introduce domain dataAnup Patel3-0/+150
Different parts of OpenSBI require their own per-domain data so introduce domain data (or sbi_domain_data) which can be registered by any part of OpenSBI. Using the domain data, the domain framework will create a data pointer for every domain which can be used to maintain some per-domain state. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
2024-10-25include: sbi: Remove cyclic include in sbi_domain_context.hAnup Patel1-0/+1
The sbi_domain_context.h includes sbi_domain.h and the sbi_domain.h also includes sbi_domain_context.h. Remove this cyclic include in sbi_domain_context.h. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2024-10-25lib: sbi_domain: Make sbi_domain_root_add_memregion() as local functionAnup Patel1-2/+2
The sbi_domain_root_add_memregion() is only used within sbi_domain implementation so rename and make it a local function. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>