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2025-02-12lib: utils/irqchip: Use fdt_driver for initializationSamuel Holland1-5/+1
The irqchip driver subsystem does not need any extra data, so it can use `struct fdt_driver` directly. The generic fdt_irqchip_init() performs a best-effort initialization of all matching DT nodes. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-12-24lib: utils: Fix irqchip registration for PLIC and APLICAnup Patel2-0/+8
Currently, the same irqchip instance is registered for multiple PLIC and APLIC instances which causes the sbi_list_for_each_entry() loop in the sbi_irqchip_init() to hang at boot-time. To address the above issue, register a separate irqchip instance for each PLIC and APLIC instance. Fixes: 2dd6eaf68055 ("lib: sbi_irqchip: Call driver warm_init from SBI core") Reported-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
2024-11-28platform: Drop irqchip warm init and exit hooksSamuel Holland1-8/+2
Now that driver lifecycle is managed from within the SBI irqchip core, platforms need only to initialize the driver once during cold init. Remove the remaining platform hooks that are no longer used. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28lib: sbi_irqchip: Call driver warm_init from SBI coreSamuel Holland2-4/+0
Currently, each platform keeps track of which irqchip driver is in use and calls its warm init function. Since the generic platform may use multiple irqchip drivers, it has logic to track an array of drivers. The code is simplified and made common across platforms by treating warm init and exit as properties of the driver, not the platform. Then the platform's only role is to select and prepare a driver during cold boot. For now, only add a .warm_init hook, since none of the existing drivers need an .exit hook. It could be added in the future if needed. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28lib: utils/irqchip: Move per-hart data from fdt_plic to plicSamuel Holland2-22/+5
The per-hart PLIC pointer is not really specific to FDT platforms. Move it into the main driver and drop the extra wrapper functions. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28lib: utils/irqchip: plic: Common PM save/restoreSamuel Holland2-30/+11
Move the PLIC save/restore functions inside the driver, so they can be reused on any platform that needs them. The memory needed to store the PLIC context is also allocated by the driver. The PM data cannot be completely encapsulated, as some platforms (including Allwinner D1) need to program the IRQ enable status to a sideband interrupt controller for wakeup capability. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28lib: utils/irqchip: plic: Provide a hartindex to context mapSamuel Holland1-4/+10
This removes platform-specific arguments to plic_warm_irqchip_init(), which makes the driver independent from the platform after cold init, and allows for further refactoring. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28lib: utils/irqchip: plic: Move delegation to base PLIC driverSamuel Holland1-0/+4
This needs to be in the base PLIC driver as part of the power management save/restore flow. This is also in preparation for moving the PLIC information in the scratch area to the base PLIC driver. After that change, the FDT PLIC layer will be unable to look up the `struct plic_data` after cold boot. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28lib: utils/irqchip: plic: Allow enabling IRQs by defaultSamuel Holland1-3/+4
Unlike other platforms, Ariane and OpenPiton enable all IRQs by default. This was described in commit b44e844880d0 ("Add support for Ariane FPGA SoC") as "due to some issue of the design." Add this workaround behind a flag in plic_warm_irqchip_init(), so every platform can use the same warm init function. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-09-25lib: utils/irqchip: Look up IMSIC data by hart indexSamuel Holland1-2/+2
This avoids needing to map a hartid to a hart index. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-08-24lib: utils/irqchip: Constify FDT pointers in parsing functionsSamuel Holland1-1/+1
Indicate that none of these functions modify the devicetree by constifying the parameter type. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-12-19lib: utils/irqchip: Add shared MMIO region for PLIC in root domainAnup Patel1-0/+1
On platforms with Smepmp, the MMIO regions accessed by M-mode need to be explicitly marked with M-mode only read/write or shared (both (M-mode and S-mode) read/write permission. If the above is not done then runtime PLIC access from M-mode on platforms with Smepmp will result in access fault when further results in CPU hotplug not working. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2022-12-17lib: utils/irqchip: plic: Ensure no out-of-bound access in context ↵Bin Meng2-4/+5
save/restore helpers Currently the context save/restore helpers writes/reads the provided array using an index whose maximum value is determined by PLIC, which potentially may disagree with the caller to these helpers. Add a parameter to ask the caller to provide the size limit of the array to ensure no out-of-bound access happens. Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-17lib: utils/irqchip: plic: Ensure no out-of-bound access in priority ↵Bin Meng2-4/+15
save/restore helpers Currently the priority save/restore helpers writes/reads the provided array using an index whose maximum value is determined by PLIC, which potentially may disagree with the caller to these helpers. Add a parameter to ask the caller to provide the size limit of the array to ensure no out-of-bound access happens. Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-08-08lib: utils/irqchip: Use kconfig for enabling/disabling driversAnup Patel2-0/+20
We update irqchip drivers makefile to use kconfig for enabling/disabling drivers. To avoid compile errors, we also enable appropriate irqchip drivers for each platform. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Tested-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Atish Patra <atishp@rivosinc.com> Tested-by: Atish Patra <atishp@rivosinc.com>
2022-06-13lib: utils/irqchip: Add wrapper for T-HEAD PLIC delegationSamuel Holland1-0/+2
The delegation bit is lost along with the rest of the PLIC state when the CPU power domain in the Allwinner D1 is powered down, so the PLIC needs to be re-delegated to S-mode during the hart resume path. Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-06-13lib: utils/irqchip: Add FDT wrappers for PLIC save/restore functionsSamuel Holland1-0/+20
These functions save/restore the state of the PLIC associated with the current hart. The context save/restore functions only manipulate a single context, since most likely the M-mode context is unused and does not need to be saved. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-06-13lib: irqchip/plic: Add priority save/restore helpersSamuel Holland1-0/+5
These can be used by platform code to save the PLIC priority state, if it would otherwise be lost during non-retentive suspend. The platform is responsible for allocating all necessary storage. As a space optimization, store the saved priority values as 8-bit integers, since that is large enough to hold any priority value on the relevant platforms. Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-06-13lib: irqchip/plic: Add context save/restore helpersSamuel Holland1-0/+6
These can be used by platform code to save the PLIC context state, if it would otherwise be lost during non-retentive suspend. The platform is responsible for allocating all necessary storage. Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-06-13lib: irqchip/plic: Factor out a context init functionSamuel Holland1-5/+3
This simplifies both the callers and the callees by removing duplicated code and consolidating the error handling. It also fixes two bugs in the process: 1) ie_words was one too large when plic->num_src was a multiple of 32. 2) plic_set_ie takes a 32-bit mask, not a Boolean value, so the FPGA platforms previously only enabled one out of every 32 interrupts. Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-06-13lib: irqchip/plic: Constify plic_data pointersSamuel Holland1-4/+5
None of the functions modify the passed-in plic_data, so mark it const. Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-02-15lib: utils/irqchip: Add APLIC initialization libraryAnup Patel1-0/+47
We add simple APLIC initialization library which is independent of hardware description format (FDT or ACPI). This APLIC initialization library can be used by custom OpenSBI platform support to setup APLIC domains. Signed-off-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com>
2022-02-15lib: utils/irqchip: Add IMSIC libraryAnup Patel1-0/+50
We add simple IMSIC library which is independent of hardware description format (FDT or ACPI). This IMSIC library can be used by custom OpenSBI platform support to setup IMSIC for external interrupts. Signed-off-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com>
2020-05-23lib: utils: Allow PLIC functions to be used for multiple PLICsAnup Patel1-4/+10
We extend all PLIC functions to have a "struct plic_data *" parameter pointing to PLIC details. This allows platforms to use these functions for multiple PLIC instances. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-23lib: utils: Remove redundant parameters from PLIC init functionsAnup Patel1-2/+2
The "target_hart" and "hart_count" parameters of PLIC cold and warm init functions are only used for sanity checks and not required in PLIC initialization. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-01lib: utils: Add simple FDT irqchip frameworkAnup Patel1-0/+26
We add simple irqchip framework which will select and use irqchip driver based on details in FDT passed by previous booting stage. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-03-18lib: utils: Move PLIC DT fix up codes to fdt_helper.cBin Meng1-2/+0
Now that we have a dedicated fdt_helper.c file for DT releated helper routines, move plic_fdt_fixup() codes from plic.c to fdt_helper.c and rename it to fdt_plic_fixup() at the same time, to keep name consistency in the same file. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2019-06-29Changed plic_set_thresh() and plic_set_ie() to publicPanagiotis Peristerakis1-0/+4
Signed-off-by: Panagiotis Peristerakis <perister@ics.forth.gr>
2019-06-19platform: Move platform common to lib/utils.Atish Patra1-0/+21
Currently, platform/common contains platform/non-platform specific common minimal drivers and libraries. This is helpful is all platforms are built within opensbi framework. Move them to lib/utils so that any external platform code also can reuse the minimalistic drivers or other common libraries. This patch doesn't introduce any functional changes. Signed-off-by: Atish Patra <atish.patra@wdc.com> Acked-by: Anup Patel <anup.patel@wdc.com>
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