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/* SPDX-License-Identifier: GPL-2.0 OR MIT */
/*
* Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
* Copyright (C) 2021 Hal Feng <hal.feng@starfivetech.com>
*/
#ifndef __DT_BINDINGS_CLOCK_STARFIVE_JH7100_ISP_H__
#define __DT_BINDINGS_CLOCK_STARFIVE_JH7100_ISP_H__
#define JH7100_ISPCLK_DPHY_CFGCLK 0
#define JH7100_ISPCLK_DPHY_REFCLK 1
#define JH7100_ISPCLK_DPHY_TXCLKESC 2
#define JH7100_ISPCLK_MIPI_RX0_PXL 3
#define JH7100_ISPCLK_MIPI_RX1_PXL 4
#define JH7100_ISPCLK_MIPI_RX0_PXL_0 5
#define JH7100_ISPCLK_MIPI_RX0_PXL_1 6
#define JH7100_ISPCLK_MIPI_RX0_PXL_2 7
#define JH7100_ISPCLK_MIPI_RX0_PXL_3 8
#define JH7100_ISPCLK_MIPI_RX0_SYS 9
#define JH7100_ISPCLK_MIPI_RX1_PXL_0 10
#define JH7100_ISPCLK_MIPI_RX1_PXL_1 11
#define JH7100_ISPCLK_MIPI_RX1_PXL_2 12
#define JH7100_ISPCLK_MIPI_RX1_PXL_3 13
#define JH7100_ISPCLK_MIPI_RX1_SYS 14
#define JH7100_ISPCLK_ISP0 15
#define JH7100_ISPCLK_ISP0_2X 16
#define JH7100_ISPCLK_ISP0_MIPI 17
#define JH7100_ISPCLK_ISP1 18
#define JH7100_ISPCLK_ISP1_2X 19
#define JH7100_ISPCLK_ISP1_MIPI 20
#define JH7100_ISPCLK_DOM4_APB 21
#define JH7100_ISPCLK_CSI2RX_APB 22
#define JH7100_ISPCLK_VIN_AXI_WR 23
#define JH7100_ISPCLK_VIN_AXI_RD 24
#define JH7100_ISPCLK_C_ISP0 25
#define JH7100_ISPCLK_C_ISP1 26
#define JH7100_ISPCLK_ISPCORE_2X 27
#define JH7100_ISPCLK_END 28
#endif /* __DT_BINDINGS_CLOCK_STARFIVE_JH7100_ISP_H__ */
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