1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
|
// SPDX-License-Identifier: GPL-2.0
/*
* Intel INT0002 "Virtual GPIO" driver
*
* Copyright (C) 2017 Hans de Goede <hdegoede@redhat.com>
*
* Loosely based on android x86 kernel code which is:
*
* Copyright (c) 2014, Intel Corporation.
*
* Author: Dyut Kumar Sil <dyut.k.sil@intel.com>
*
* Some peripherals on Bay Trail and Cherry Trail platforms signal a Power
* Management Event (PME) to the Power Management Controller (PMC) to wakeup
* the system. When this happens software needs to clear the PME bus 0 status
* bit in the GPE0a_STS register to avoid an IRQ storm on IRQ 9.
*
* This is modelled in ACPI through the INT0002 ACPI device, which is
* called a "Virtual GPIO controller" in ACPI because it defines the event
* handler to call when the PME triggers through _AEI and _L02 / _E02
* methods as would be done for a real GPIO interrupt in ACPI. Note this
* is a hack to define an AML event handler for the PME while using existing
* ACPI mechanisms, this is not a real GPIO at all.
*
* This driver will bind to the INT0002 device, and register as a GPIO
* controller, letting gpiolib-acpi.c call the _L02 handler as it would
* for a real GPIO controller.
*/
#include <linux/acpi.h>
#include <linux/bitmap.h>
#include <linux/gpio/driver.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/suspend.h>
#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#define DRV_NAME "INT0002 Virtual GPIO"
/* For some reason the virtual GPIO pin tied to the GPE is numbered pin 2 */
#define GPE0A_PME_B0_VIRT_GPIO_PIN 2
#define GPE0A_PME_B0_STS_BIT BIT(13)
#define GPE0A_PME_B0_EN_BIT BIT(13)
#define GPE0A_STS_PORT 0x420
#define GPE0A_EN_PORT 0x428
/*
* As this is not a real GPIO at all, but just a hack to model an event in
* ACPI the get / set functions are dummy functions.
*/
static int int0002_gpio_get(struct gpio_chip *chip, unsigned int offset)
{
return 0;
}
static void int0002_gpio_set(struct gpio_chip *chip, unsigned int offset,
int value)
{
}
static int int0002_gpio_direction_output(struct gpio_chip *chip,
unsigned int offset, int value)
{
return 0;
}
static void int0002_irq_ack(struct irq_data *data)
{
outl(GPE0A_PME_B0_STS_BIT, GPE0A_STS_PORT);
}
static void int0002_irq_unmask(struct irq_data *data)
{
u32 gpe_en_reg;
gpe_en_reg = inl(GPE0A_EN_PORT);
gpe_en_reg |= GPE0A_PME_B0_EN_BIT;
outl(gpe_en_reg, GPE0A_EN_PORT);
}
static void int0002_irq_mask(struct irq_data *data)
{
u32 gpe_en_reg;
gpe_en_reg = inl(GPE0A_EN_PORT);
gpe_en_reg &= ~GPE0A_PME_B0_EN_BIT;
outl(gpe_en_reg, GPE0A_EN_PORT);
}
static int int0002_irq_set_wake(struct irq_data *data, unsigned int on)
{
struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
struct platform_device *pdev = to_platform_device(chip->parent);
int irq = platform_get_irq(pdev, 0);
/* Propagate to parent irq */
if (on)
enable_irq_wake(irq);
else
disable_irq_wake(irq);
return 0;
}
static irqreturn_t int0002_irq(int irq, void *data)
{
struct gpio_chip *chip = data;
u32 gpe_sts_reg;
gpe_sts_reg = inl(GPE0A_STS_PORT);
if (!(gpe_sts_reg & GPE0A_PME_B0_STS_BIT))
return IRQ_NONE;
generic_handle_irq(irq_find_mapping(chip->irq.domain,
GPE0A_PME_B0_VIRT_GPIO_PIN));
pm_wakeup_hard_event(chip->parent);
return IRQ_HANDLED;
}
static struct irq_chip int0002_byt_irqchip = {
.name = DRV_NAME,
.irq_ack = int0002_irq_ack,
.irq_mask = int0002_irq_mask,
.irq_unmask = int0002_irq_unmask,
.irq_set_wake = int0002_irq_set_wake,
};
static struct irq_chip int0002_cht_irqchip = {
.name = DRV_NAME,
.irq_ack = int0002_irq_ack,
.irq_mask = int0002_irq_mask,
.irq_unmask = int0002_irq_unmask,
/*
* No set_wake, on CHT the IRQ is typically shared with the ACPI SCI
* and we don't want to mess with the ACPI SCI irq settings.
*/
.flags = IRQCHIP_SKIP_SET_WAKE,
};
static const struct x86_cpu_id int0002_cpu_ids[] = {
X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &int0002_byt_irqchip),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &int0002_cht_irqchip),
{}
};
static void int0002_init_irq_valid_mask(struct gpio_chip *chip,
unsigned long *valid_mask,
unsigned int ngpios)
{
bitmap_clear(valid_mask, 0, GPE0A_PME_B0_VIRT_GPIO_PIN);
}
static int int0002_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
const struct x86_cpu_id *cpu_id;
struct gpio_chip *chip;
struct gpio_irq_chip *girq;
int irq, ret;
/* Menlow has a different INT0002 device? <sigh> */
cpu_id = x86_match_cpu(int0002_cpu_ids);
if (!cpu_id)
return -ENODEV;
irq = platform_get_irq(pdev, 0);
if (irq < 0)
return irq;
chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
if (!chip)
return -ENOMEM;
chip->label = DRV_NAME;
chip->parent = dev;
chip->owner = THIS_MODULE;
chip->get = int0002_gpio_get;
chip->set = int0002_gpio_set;
chip->direction_input = int0002_gpio_get;
chip->direction_output = int0002_gpio_direction_output;
chip->base = -1;
chip->ngpio = GPE0A_PME_B0_VIRT_GPIO_PIN + 1;
chip->irq.init_valid_mask = int0002_init_irq_valid_mask;
/*
* We directly request the irq here instead of passing a flow-handler
* to gpiochip_set_chained_irqchip, because the irq is shared.
* FIXME: augment this if we managed to pull handling of shared
* IRQs into gpiolib.
*/
ret = devm_request_irq(dev, irq, int0002_irq,
IRQF_SHARED, "INT0002", chip);
if (ret) {
dev_err(dev, "Error requesting IRQ %d: %d\n", irq, ret);
return ret;
}
girq = &chip->irq;
girq->chip = (struct irq_chip *)cpu_id->driver_data;
/* This let us handle the parent IRQ in the driver */
girq->parent_handler = NULL;
girq->num_parents = 0;
girq->parents = NULL;
girq->default_type = IRQ_TYPE_NONE;
girq->handler = handle_edge_irq;
ret = devm_gpiochip_add_data(dev, chip, NULL);
if (ret) {
dev_err(dev, "Error adding gpio chip: %d\n", ret);
return ret;
}
device_init_wakeup(dev, true);
return 0;
}
static int int0002_remove(struct platform_device *pdev)
{
device_init_wakeup(&pdev->dev, false);
return 0;
}
static const struct acpi_device_id int0002_acpi_ids[] = {
{ "INT0002", 0 },
{ },
};
MODULE_DEVICE_TABLE(acpi, int0002_acpi_ids);
static struct platform_driver int0002_driver = {
.driver = {
.name = DRV_NAME,
.acpi_match_table = int0002_acpi_ids,
},
.probe = int0002_probe,
.remove = int0002_remove,
};
module_platform_driver(int0002_driver);
MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
MODULE_DESCRIPTION("Intel INT0002 Virtual GPIO driver");
MODULE_LICENSE("GPL v2");
|
