1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
|
// SPDX-License-Identifier: GPL-2.0
/*
* Analog Devices AD7292 SPI ADC driver
*
* Copyright 2019 Analog Devices Inc.
*/
#include <linux/bitfield.h>
#include <linux/device.h>
#include <linux/module.h>
#include <linux/regulator/consumer.h>
#include <linux/spi/spi.h>
#include <linux/iio/iio.h>
#define ADI_VENDOR_ID 0x0018
/* AD7292 registers definition */
#define AD7292_REG_VENDOR_ID 0x00
#define AD7292_REG_CONF_BANK 0x05
#define AD7292_REG_CONV_COMM 0x0E
#define AD7292_REG_ADC_CH(x) (0x10 + (x))
/* AD7292 configuration bank subregisters definition */
#define AD7292_BANK_REG_VIN_RNG0 0x10
#define AD7292_BANK_REG_VIN_RNG1 0x11
#define AD7292_BANK_REG_SAMP_MODE 0x12
#define AD7292_RD_FLAG_MSK(x) (BIT(7) | ((x) & 0x3F))
/* AD7292_REG_ADC_CONVERSION */
#define AD7292_ADC_DATA_MASK GENMASK(15, 6)
#define AD7292_ADC_DATA(x) FIELD_GET(AD7292_ADC_DATA_MASK, x)
/* AD7292_CHANNEL_SAMPLING_MODE */
#define AD7292_CH_SAMP_MODE(reg, ch) (((reg) >> 8) & BIT(ch))
/* AD7292_CHANNEL_VIN_RANGE */
#define AD7292_CH_VIN_RANGE(reg, ch) ((reg) & BIT(ch))
#define AD7292_VOLTAGE_CHAN(_chan) \
{ \
.type = IIO_VOLTAGE, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_SCALE), \
.indexed = 1, \
.channel = _chan, \
}
static const struct iio_chan_spec ad7292_channels[] = {
AD7292_VOLTAGE_CHAN(0),
AD7292_VOLTAGE_CHAN(1),
AD7292_VOLTAGE_CHAN(2),
AD7292_VOLTAGE_CHAN(3),
AD7292_VOLTAGE_CHAN(4),
AD7292_VOLTAGE_CHAN(5),
AD7292_VOLTAGE_CHAN(6),
AD7292_VOLTAGE_CHAN(7)
};
static const struct iio_chan_spec ad7292_channels_diff[] = {
{
.type = IIO_VOLTAGE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.indexed = 1,
.differential = 1,
.channel = 0,
.channel2 = 1,
},
AD7292_VOLTAGE_CHAN(2),
AD7292_VOLTAGE_CHAN(3),
AD7292_VOLTAGE_CHAN(4),
AD7292_VOLTAGE_CHAN(5),
AD7292_VOLTAGE_CHAN(6),
AD7292_VOLTAGE_CHAN(7)
};
struct ad7292_state {
struct spi_device *spi;
struct regulator *reg;
unsigned short vref_mv;
__be16 d16 ____cacheline_aligned;
u8 d8[2];
};
static int ad7292_spi_reg_read(struct ad7292_state *st, unsigned int addr)
{
int ret;
st->d8[0] = AD7292_RD_FLAG_MSK(addr);
ret = spi_write_then_read(st->spi, st->d8, 1, &st->d16, 2);
if (ret < 0)
return ret;
return be16_to_cpu(st->d16);
}
static int ad7292_spi_subreg_read(struct ad7292_state *st, unsigned int addr,
unsigned int sub_addr, unsigned int len)
{
unsigned int shift = 16 - (8 * len);
int ret;
st->d8[0] = AD7292_RD_FLAG_MSK(addr);
st->d8[1] = sub_addr;
ret = spi_write_then_read(st->spi, st->d8, 2, &st->d16, len);
if (ret < 0)
return ret;
return (be16_to_cpu(st->d16) >> shift);
}
static int ad7292_single_conversion(struct ad7292_state *st,
unsigned int chan_addr)
{
int ret;
struct spi_transfer t[] = {
{
.tx_buf = &st->d8,
.len = 4,
.delay = {
.value = 6,
.unit = SPI_DELAY_UNIT_USECS
},
}, {
.rx_buf = &st->d16,
.len = 2,
},
};
st->d8[0] = chan_addr;
st->d8[1] = AD7292_RD_FLAG_MSK(AD7292_REG_CONV_COMM);
ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
if (ret < 0)
return ret;
return be16_to_cpu(st->d16);
}
static int ad7292_vin_range_multiplier(struct ad7292_state *st, int channel)
{
int samp_mode, range0, range1, factor = 1;
/*
* Every AD7292 ADC channel may have its input range adjusted according
* to the settings at the ADC sampling mode and VIN range subregisters.
* For a given channel, the minimum input range is equal to Vref, and it
* may be increased by a multiplier factor of 2 or 4 according to the
* following rule:
* If channel is being sampled with respect to AGND:
* factor = 4 if VIN range0 and VIN range1 equal 0
* factor = 2 if only one of VIN ranges equal 1
* factor = 1 if both VIN range0 and VIN range1 equal 1
* If channel is being sampled with respect to AVDD:
* factor = 4 if VIN range0 and VIN range1 equal 0
* Behavior is undefined if any of VIN range doesn't equal 0
*/
samp_mode = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK,
AD7292_BANK_REG_SAMP_MODE, 2);
if (samp_mode < 0)
return samp_mode;
range0 = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK,
AD7292_BANK_REG_VIN_RNG0, 2);
if (range0 < 0)
return range0;
range1 = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK,
AD7292_BANK_REG_VIN_RNG1, 2);
if (range1 < 0)
return range1;
if (AD7292_CH_SAMP_MODE(samp_mode, channel)) {
/* Sampling with respect to AGND */
if (!AD7292_CH_VIN_RANGE(range0, channel))
factor *= 2;
if (!AD7292_CH_VIN_RANGE(range1, channel))
factor *= 2;
} else {
/* Sampling with respect to AVDD */
if (AD7292_CH_VIN_RANGE(range0, channel) ||
AD7292_CH_VIN_RANGE(range1, channel))
return -EPERM;
factor = 4;
}
return factor;
}
static int ad7292_read_raw(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
int *val, int *val2, long info)
{
struct ad7292_state *st = iio_priv(indio_dev);
unsigned int ch_addr;
int ret;
switch (info) {
case IIO_CHAN_INFO_RAW:
ch_addr = AD7292_REG_ADC_CH(chan->channel);
ret = ad7292_single_conversion(st, ch_addr);
if (ret < 0)
return ret;
*val = AD7292_ADC_DATA(ret);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
/*
* To convert a raw value to standard units, the IIO defines
* this formula: Scaled value = (raw + offset) * scale.
* For the scale to be a correct multiplier for (raw + offset),
* it must be calculated as the input range divided by the
* number of possible distinct input values. Given the ADC data
* is 10 bit long, it may assume 2^10 distinct values.
* Hence, scale = range / 2^10. The IIO_VAL_FRACTIONAL_LOG2
* return type indicates to the IIO API to divide *val by 2 to
* the power of *val2 when returning from read_raw.
*/
ret = ad7292_vin_range_multiplier(st, chan->channel);
if (ret < 0)
return ret;
*val = st->vref_mv * ret;
*val2 = 10;
return IIO_VAL_FRACTIONAL_LOG2;
default:
break;
}
return -EINVAL;
}
static const struct iio_info ad7292_info = {
.read_raw = ad7292_read_raw,
};
static void ad7292_regulator_disable(void *data)
{
struct ad7292_state *st = data;
regulator_disable(st->reg);
}
static int ad7292_probe(struct spi_device *spi)
{
struct ad7292_state *st;
struct iio_dev *indio_dev;
struct device_node *child;
bool diff_channels = 0;
int ret;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
st->spi = spi;
ret = ad7292_spi_reg_read(st, AD7292_REG_VENDOR_ID);
if (ret != ADI_VENDOR_ID) {
dev_err(&spi->dev, "Wrong vendor id 0x%x\n", ret);
return -EINVAL;
}
spi_set_drvdata(spi, indio_dev);
st->reg = devm_regulator_get_optional(&spi->dev, "vref");
if (!IS_ERR(st->reg)) {
ret = regulator_enable(st->reg);
if (ret) {
dev_err(&spi->dev,
"Failed to enable external vref supply\n");
return ret;
}
ret = devm_add_action_or_reset(&spi->dev,
ad7292_regulator_disable, st);
if (ret) {
regulator_disable(st->reg);
return ret;
}
ret = regulator_get_voltage(st->reg);
if (ret < 0)
return ret;
st->vref_mv = ret / 1000;
} else {
/* Use the internal voltage reference. */
st->vref_mv = 1250;
}
indio_dev->dev.parent = &spi->dev;
indio_dev->name = spi_get_device_id(spi)->name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &ad7292_info;
for_each_available_child_of_node(spi->dev.of_node, child) {
diff_channels = of_property_read_bool(child, "diff-channels");
if (diff_channels)
break;
}
if (diff_channels) {
indio_dev->num_channels = ARRAY_SIZE(ad7292_channels_diff);
indio_dev->channels = ad7292_channels_diff;
} else {
indio_dev->num_channels = ARRAY_SIZE(ad7292_channels);
indio_dev->channels = ad7292_channels;
}
return devm_iio_device_register(&spi->dev, indio_dev);
}
static const struct spi_device_id ad7292_id_table[] = {
{ "ad7292", 0 },
{}
};
MODULE_DEVICE_TABLE(spi, ad7292_id_table);
static const struct of_device_id ad7292_of_match[] = {
{ .compatible = "adi,ad7292" },
{ },
};
MODULE_DEVICE_TABLE(of, ad7292_of_match);
static struct spi_driver ad7292_driver = {
.driver = {
.name = "ad7292",
.of_match_table = ad7292_of_match,
},
.probe = ad7292_probe,
.id_table = ad7292_id_table,
};
module_spi_driver(ad7292_driver);
MODULE_AUTHOR("Marcelo Schmitt <marcelo.schmitt1@gmail.com>");
MODULE_DESCRIPTION("Analog Devices AD7292 ADC driver");
MODULE_LICENSE("GPL v2");
|