blob: f31c9f13a9fc156656b1944054a4dbd8f9d1faf5 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
|
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2022 Intel Corporation
*/
#ifndef __INTEL_PERF_OA_REGS__
#define __INTEL_PERF_OA_REGS__
#include "i915_reg_defs.h"
#define GEN7_OACONTROL _MMIO(0x2360)
#define GEN7_OACONTROL_CTX_MASK 0xFFFFF000
#define GEN7_OACONTROL_TIMER_PERIOD_MASK 0x3F
#define GEN7_OACONTROL_TIMER_PERIOD_SHIFT 6
#define GEN7_OACONTROL_TIMER_ENABLE (1 << 5)
#define GEN7_OACONTROL_FORMAT_A13 (0 << 2)
#define GEN7_OACONTROL_FORMAT_A29 (1 << 2)
#define GEN7_OACONTROL_FORMAT_A13_B8_C8 (2 << 2)
#define GEN7_OACONTROL_FORMAT_A29_B8_C8 (3 << 2)
#define GEN7_OACONTROL_FORMAT_B4_C8 (4 << 2)
#define GEN7_OACONTROL_FORMAT_A45_B8_C8 (5 << 2)
#define GEN7_OACONTROL_FORMAT_B4_C8_A16 (6 << 2)
#define GEN7_OACONTROL_FORMAT_C4_B8 (7 << 2)
#define GEN7_OACONTROL_FORMAT_SHIFT 2
#define GEN7_OACONTROL_PER_CTX_ENABLE (1 << 1)
#define GEN7_OACONTROL_ENABLE (1 << 0)
#define GEN8_OACTXID _MMIO(0x2364)
#define GEN8_OA_DEBUG _MMIO(0x2B04)
#define GEN9_OA_DEBUG_DISABLE_CLK_RATIO_REPORTS (1 << 5)
#define GEN9_OA_DEBUG_INCLUDE_CLK_RATIO (1 << 6)
#define GEN9_OA_DEBUG_DISABLE_GO_1_0_REPORTS (1 << 2)
#define GEN9_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS (1 << 1)
#define GEN8_OACONTROL _MMIO(0x2B00)
#define GEN8_OA_REPORT_FORMAT_A12 (0 << 2)
#define GEN8_OA_REPORT_FORMAT_A12_B8_C8 (2 << 2)
#define GEN8_OA_REPORT_FORMAT_A36_B8_C8 (5 << 2)
#define GEN8_OA_REPORT_FORMAT_C4_B8 (7 << 2)
#define GEN8_OA_REPORT_FORMAT_SHIFT 2
#define GEN8_OA_SPECIFIC_CONTEXT_ENABLE (1 << 1)
#define GEN8_OA_COUNTER_ENABLE (1 << 0)
#define GEN8_OACTXCONTROL _MMIO(0x2360)
#define GEN8_OA_TIMER_PERIOD_MASK 0x3F
#define GEN8_OA_TIMER_PERIOD_SHIFT 2
#define GEN8_OA_TIMER_ENABLE (1 << 1)
#define GEN8_OA_COUNTER_RESUME (1 << 0)
#define GEN7_OABUFFER _MMIO(0x23B0) /* R/W */
#define GEN7_OABUFFER_OVERRUN_DISABLE (1 << 3)
#define GEN7_OABUFFER_EDGE_TRIGGER (1 << 2)
#define GEN7_OABUFFER_STOP_RESUME_ENABLE (1 << 1)
#define GEN7_OABUFFER_RESUME (1 << 0)
#define GEN8_OABUFFER_UDW _MMIO(0x23b4)
#define GEN8_OABUFFER _MMIO(0x2b14)
#define GEN8_OABUFFER_MEM_SELECT_GGTT (1 << 0) /* 0: PPGTT, 1: GGTT */
#define GEN7_OASTATUS1 _MMIO(0x2364)
#define GEN7_OASTATUS1_TAIL_MASK 0xffffffc0
#define GEN7_OASTATUS1_COUNTER_OVERFLOW (1 << 2)
#define GEN7_OASTATUS1_OABUFFER_OVERFLOW (1 << 1)
#define GEN7_OASTATUS1_REPORT_LOST (1 << 0)
#define GEN7_OASTATUS2 _MMIO(0x2368)
#define GEN7_OASTATUS2_HEAD_MASK 0xffffffc0
#define GEN7_OASTATUS2_MEM_SELECT_GGTT (1 << 0) /* 0: PPGTT, 1: GGTT */
#define GEN8_OASTATUS _MMIO(0x2b08)
#define GEN8_OASTATUS_TAIL_POINTER_WRAP (1 << 17)
#define GEN8_OASTATUS_HEAD_POINTER_WRAP (1 << 16)
#define GEN8_OASTATUS_OVERRUN_STATUS (1 << 3)
#define GEN8_OASTATUS_COUNTER_OVERFLOW (1 << 2)
#define GEN8_OASTATUS_OABUFFER_OVERFLOW (1 << 1)
#define GEN8_OASTATUS_REPORT_LOST (1 << 0)
#define GEN8_OAHEADPTR _MMIO(0x2B0C)
#define GEN8_OAHEADPTR_MASK 0xffffffc0
#define GEN8_OATAILPTR _MMIO(0x2B10)
#define GEN8_OATAILPTR_MASK 0xffffffc0
#define OABUFFER_SIZE_128K (0 << 3)
#define OABUFFER_SIZE_256K (1 << 3)
#define OABUFFER_SIZE_512K (2 << 3)
#define OABUFFER_SIZE_1M (3 << 3)
#define OABUFFER_SIZE_2M (4 << 3)
#define OABUFFER_SIZE_4M (5 << 3)
#define OABUFFER_SIZE_8M (6 << 3)
#define OABUFFER_SIZE_16M (7 << 3)
#define GEN12_OA_TLB_INV_CR _MMIO(0xceec)
/* Gen12 OAR unit */
#define GEN12_OAR_OACONTROL _MMIO(0x2960)
#define GEN12_OAR_OACONTROL_COUNTER_FORMAT_SHIFT 1
#define GEN12_OAR_OACONTROL_COUNTER_ENABLE (1 << 0)
#define GEN12_OACTXCONTROL _MMIO(0x2360)
#define GEN12_OAR_OASTATUS _MMIO(0x2968)
/* Gen12 OAG unit */
#define GEN12_OAG_OAHEADPTR _MMIO(0xdb00)
#define GEN12_OAG_OAHEADPTR_MASK 0xffffffc0
#define GEN12_OAG_OATAILPTR _MMIO(0xdb04)
#define GEN12_OAG_OATAILPTR_MASK 0xffffffc0
#define GEN12_OAG_OABUFFER _MMIO(0xdb08)
#define GEN12_OAG_OABUFFER_BUFFER_SIZE_MASK (0x7)
#define GEN12_OAG_OABUFFER_BUFFER_SIZE_SHIFT (3)
#define GEN12_OAG_OABUFFER_MEMORY_SELECT (1 << 0) /* 0: PPGTT, 1: GGTT */
#define GEN12_OAG_OAGLBCTXCTRL _MMIO(0x2b28)
#define GEN12_OAG_OAGLBCTXCTRL_TIMER_PERIOD_SHIFT 2
#define GEN12_OAG_OAGLBCTXCTRL_TIMER_ENABLE (1 << 1)
#define GEN12_OAG_OAGLBCTXCTRL_COUNTER_RESUME (1 << 0)
#define GEN12_OAG_OACONTROL _MMIO(0xdaf4)
#define GEN12_OAG_OACONTROL_OA_COUNTER_FORMAT_SHIFT 2
#define GEN12_OAG_OACONTROL_OA_COUNTER_ENABLE (1 << 0)
#define GEN12_OAG_OA_DEBUG _MMIO(0xdaf8)
#define GEN12_OAG_OA_DEBUG_INCLUDE_CLK_RATIO (1 << 6)
#define GEN12_OAG_OA_DEBUG_DISABLE_CLK_RATIO_REPORTS (1 << 5)
#define GEN12_OAG_OA_DEBUG_DISABLE_GO_1_0_REPORTS (1 << 2)
#define GEN12_OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS (1 << 1)
#define GEN12_OAG_OASTATUS _MMIO(0xdafc)
#define GEN12_OAG_OASTATUS_COUNTER_OVERFLOW (1 << 2)
#define GEN12_OAG_OASTATUS_BUFFER_OVERFLOW (1 << 1)
#define GEN12_OAG_OASTATUS_REPORT_LOST (1 << 0)
#define GDT_CHICKEN_BITS _MMIO(0x9840)
#define GT_NOA_ENABLE 0x00000080
#endif /* __INTEL_PERF_OA_REGS__ */
|
