blob: 229dffcbdc98fec10697765a2b6f4cea6d6d55c5 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
|
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Toshiba ARM SoC reset controller driver
*
* Copyright (c) 2021 TOSHIBA CORPORATION
*
* Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
*/
#ifndef _VISCONTI_RESET_H_
#define _VISCONTI_RESET_H_
#include <linux/reset-controller.h>
struct visconti_reset_data {
u32 rson_offset;
u32 rsoff_offset;
u8 rs_idx;
};
struct visconti_reset {
struct reset_controller_dev rcdev;
struct regmap *regmap;
const struct visconti_reset_data *resets;
spinlock_t *lock;
};
extern const struct reset_control_ops visconti_reset_ops;
int visconti_register_reset_controller(struct device *dev,
struct regmap *regmap,
const struct visconti_reset_data *resets,
unsigned int num_resets,
const struct reset_control_ops *reset_ops,
spinlock_t *lock);
#endif /* _VISCONTI_RESET_H_ */
|
