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/*
* Device Tree Source for IBM Walnut
*
* Copyright 2007 IBM Corp.
* Josh Boyer <jwboyer@linux.vnet.ibm.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without
* any warranty of any kind, whether express or implied.
*/
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "ibm,walnut";
compatible = "ibm,walnut";
dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC;
serial0 = &UART0;
serial1 = &UART1;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
model = "PowerPC,405GP";
reg = <0x00000000>;
clock-frequency = <200000000>; /* Filled in by zImage */
timebase-frequency = <0>; /* Filled in by zImage */
i-cache-line-size = <32>;
d-cache-line-size = <32>;
i-cache-size = <16384>;
d-cache-size = <16384>;
dcr-controller;
dcr-access-method = "native";
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x00000000>; /* Filled in by zImage */
};
UIC0: interrupt-controller {
compatible = "ibm,uic";
interrupt-controller;
cell-index = <0>;
dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
};
plb {
compatible = "ibm,plb3";
#address-cells = <1>;
#size-cells = <1>;
ranges;
clock-frequency = <0>; /* Filled in by zImage */
SDRAM0: memory-controller {
compatible = "ibm,sdram-405gp";
dcr-reg = <0x010 0x002>;
};
MAL: mcmal {
compatible = "ibm,mcmal-405gp", "ibm,mcmal";
dcr-reg = <0x180 0x062>;
num-tx-chans = <1>;
num-rx-chans = <1>;
interrupt-parent = <&UIC0>;
interrupts = <
0xb 0x4 /* TXEOB */
0xc 0x4 /* RXEOB */
0xa 0x4 /* SERR */
0xd 0x4 /* TXDE */
0xe 0x4 /* RXDE */>;
};
POB0: opb {
compatible = "ibm,opb-405gp", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0xef600000 0xef600000 0x00a00000>;
dcr-reg = <0x0a0 0x005>;
clock-frequency = <0>; /* Filled in by zImage */
UART0: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
reg = <0xef600300 0x00000008>;
virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by zImage */
current-speed = <9600>;
interrupt-parent = <&UIC0>;
interrupts = <0x0 0x4>;
};
UART1: serial@ef600400 {
device_type = "serial";
compatible = "ns16550";
reg = <0xef600400 0x00000008>;
virtual-reg = <0xef600400>;
clock-frequency = <0>; /* Filled in by zImage */
current-speed = <9600>;
interrupt-parent = <&UIC0>;
interrupts = <0x1 0x4>;
};
IIC: i2c@ef600500 {
compatible = "ibm,iic-405gp", "ibm,iic";
reg = <0xef600500 0x00000011>;
interrupt-parent = <&UIC0>;
interrupts = <0x2 0x4>;
};
GPIO: gpio@ef600700 {
compatible = "ibm,gpio-405gp";
reg = <0xef600700 0x00000020>;
};
EMAC: ethernet@ef600800 {
device_type = "network";
compatible = "ibm,emac-405gp", "ibm,emac";
interrupt-parent = <&UIC0>;
interrupts = <
0xf 0x4 /* Ethernet */
0x9 0x4 /* Ethernet Wake Up */>;
local-mac-address = [000000000000]; /* Filled in by zImage */
reg = <0xef600800 0x00000070>;
mal-device = <&MAL>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <1500>;
rx-fifo-size = <4096>;
tx-fifo-size = <2048>;
phy-mode = "rmii";
phy-map = <0x00000001>;
};
};
EBC0: ebc {
compatible = "ibm,ebc-405gp", "ibm,ebc";
dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
/* The ranges property is supplied by the bootwrapper
* and is based on the firmware's configuration of the
* EBC bridge
*/
clock-frequency = <0>; /* Filled in by zImage */
sram@0,0 {
reg = <0x00000000 0x00000000 0x00080000>;
};
flash@0,80000 {
compatible = "jedec-flash";
bank-width = <1>;
reg = <0x00000000 0x00080000 0x00080000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "OpenBIOS";
reg = <0x00000000 0x00080000>;
read-only;
};
};
nvram@1,0 {
/* NVRAM and RTC */
compatible = "ds1743-nvram";
#bytes = <0x2000>;
reg = <0x00000001 0x00000000 0x00002000>;
};
keyboard@2,0 {
compatible = "intel,82C42PC";
reg = <0x00000002 0x00000000 0x00000002>;
};
ir@3,0 {
compatible = "ti,TIR2000PAG";
reg = <0x00000003 0x00000000 0x00000010>;
};
fpga@7,0 {
compatible = "Walnut-FPGA";
reg = <0x00000007 0x00000000 0x00000010>;
virtual-reg = <0xf0300005>;
};
};
PCI0: pci@ec000000 {
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
primary;
reg = <0xeec00000 0x00000008 /* Config space access */
0xeed80000 0x00000004 /* IACK */
0xeed80000 0x00000004 /* Special cycle */
0xef480000 0x00000040>; /* Internal registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed. Chip supports a second
* IO range but we don't use it for now
*/
ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
/* Walnut has all 4 IRQ pins tied together per slot */
interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
interrupt-map = <
/* IDSEL 1 */
0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
/* IDSEL 2 */
0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
/* IDSEL 3 */
0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
/* IDSEL 4 */
0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
>;
};
};
chosen {
stdout-path = "/plb/opb/serial@ef600300";
};
};
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