1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
|
// SPDX-License-Identifier: GPL-2.0
/*
* SDM845 SoC device tree source
*
* Copyright (c) 2018, The Linux Foundation. All rights reserved.
*/
&slim {
status = "okay";
slim@1 {
reg = <1>;
#address-cells = <2>;
#size-cells = <0>;
wcd9340_ifd: ifd@0,0 {
compatible = "slim217,250";
reg = <0 0>;
};
wcd9340: codec@1,0 {
compatible = "slim217,250";
reg = <1 0>;
slim-ifc-dev = <&wcd9340_ifd>;
#sound-dai-cells = <1>;
interrupts-extended = <&tlmm 54 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
clock-names = "extclk";
clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
#clock-cells = <0>;
clock-frequency = <9600000>;
clock-output-names = "mclk";
pinctrl-0 = <&wcd_intr_default>;
pinctrl-names = "default";
qcom,micbias1-microvolt = <1800000>;
qcom,micbias2-microvolt = <1800000>;
qcom,micbias3-microvolt = <1800000>;
qcom,micbias4-microvolt = <1800000>;
#address-cells = <1>;
#size-cells = <1>;
wcdgpio: gpio-controller@42 {
compatible = "qcom,wcd9340-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x42 0x2>;
};
swm: swm@c85 {
compatible = "qcom,soundwire-v1.3.0";
reg = <0xc85 0x40>;
interrupts-extended = <&wcd9340 20>;
qcom,dout-ports = <6>;
qcom,din-ports = <2>;
qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x7 0x1f 0x3f 0x0f 0x0f>;
qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x6 0x12 0x0d 0x07 0x0a>;
qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x1f 0x00 0x00 0x1f 0x00 0x00>;
#sound-dai-cells = <1>;
clocks = <&wcd9340>;
clock-names = "iface";
#address-cells = <2>;
#size-cells = <0>;
};
};
};
};
&tlmm {
wcd_intr_default: wcd-intr-default-state {
pins = "gpio54";
function = "gpio";
input-enable;
bias-pull-down;
drive-strength = <2>;
};
};
|
