blob: 40d34c8384a5e10392896320a383a449559df086 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
|
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree fragment for LS1028A QDS board, serdes 69xx
*
* Copyright 2019-2021 NXP
*
* Requires a LS1028A QDS board with lane B rework.
* Requires a SCH-30842 card in slot 1 and a SCH-28021 card in slot 2.
*/
/dts-v1/;
/plugin/;
&mdio_slot1 {
#address-cells = <1>;
#size-cells = <0>;
slot1_sgmii: ethernet-phy@2 {
/* AQR112 */
reg = <0x2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
};
&enetc_port0 {
phy-handle = <&slot1_sgmii>;
phy-mode = "2500base-x";
managed = "in-band-status";
status = "okay";
};
&mdio_slot2 {
#address-cells = <1>;
#size-cells = <0>;
/* 4 ports on VSC8514 */
slot2_qsgmii0: ethernet-phy@8 {
reg = <0x8>;
};
slot2_qsgmii1: ethernet-phy@9 {
reg = <0x9>;
};
slot2_qsgmii2: ethernet-phy@a {
reg = <0xa>;
};
slot2_qsgmii3: ethernet-phy@b {
reg = <0xb>;
};
};
&mscc_felix_ports {
port@0 {
status = "okay";
phy-handle = <&slot2_qsgmii0>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@1 {
status = "okay";
phy-handle = <&slot2_qsgmii1>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@2 {
status = "okay";
phy-handle = <&slot2_qsgmii2>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@3 {
status = "okay";
phy-handle = <&slot2_qsgmii3>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
};
&mscc_felix {
status = "okay";
};
|
