summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/r7s72100-genmai.dts
blob: 1e8447176b1051f32507d7608183372aaca51974 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for the Genmai board
 *
 * Copyright (C) 2013-14 Renesas Solutions Corp.
 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
 */

/dts-v1/;
#include "r7s72100.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/r7s72100-pinctrl.h>

/ {
	model = "Genmai";
	compatible = "renesas,genmai", "renesas,r7s72100";

	aliases {
		serial0 = &scif2;
	};

	chosen {
		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
		stdout-path = "serial0:115200n8";
	};

	memory@8000000 {
		device_type = "memory";
		reg = <0x08000000 0x08000000>;
	};

	lbsc {
		#address-cells = <1>;
		#size-cells = <1>;
	};

	leds {
		status = "okay";
		compatible = "gpio-leds";

		led1 {
			gpios = <&port4 10 GPIO_ACTIVE_LOW>;
		};

		led2 {
			gpios = <&port4 11 GPIO_ACTIVE_LOW>;
		};
	};
};

&pinctrl {

	scif2_pins: serial2 {
		/* P3_0 as TxD2; P3_2 as RxD2 */
		pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>;
	};

	i2c2_pins: i2c2 {
		/* RIIC2: P1_4 as SCL, P1_5 as SDA */
		pinmux = <RZA1_PINMUX(1, 4, 1)>, <RZA1_PINMUX(1, 5, 1)>;
	};

	ether_pins: ether {
		/* Ethernet on Ports 1,2,3,5 */
		pinmux = <RZA1_PINMUX(1, 14, 4)>,/* P1_14 = ET_COL  */
			 <RZA1_PINMUX(5, 9, 2)>, /* P5_9 = ET_MDC   */
			 <RZA1_PINMUX(3, 3, 2)>, /* P3_3 = ET_MDIO */
			 <RZA1_PINMUX(3, 4, 2)>, /* P3_4 = ET_RXCLK */
			 <RZA1_PINMUX(3, 5, 2)>, /* P3_5 = ET_RXER  */
			 <RZA1_PINMUX(3, 6, 2)>, /* P3_6 = ET_RXDV  */
			 <RZA1_PINMUX(2, 0, 2)>, /* P2_0 = ET_TXCLK */
			 <RZA1_PINMUX(2, 1, 2)>, /* P2_1 = ET_TXER  */
			 <RZA1_PINMUX(2, 2, 2)>, /* P2_2 = ET_TXEN  */
			 <RZA1_PINMUX(2, 3, 2)>, /* P2_3 = ET_CRS   */
			 <RZA1_PINMUX(2, 4, 2)>, /* P2_4 = ET_TXD0  */
			 <RZA1_PINMUX(2, 5, 2)>, /* P2_5 = ET_TXD1  */
			 <RZA1_PINMUX(2, 6, 2)>, /* P2_6 = ET_TXD2  */
			 <RZA1_PINMUX(2, 7, 2)>, /* P2_7 = ET_TXD3  */
			 <RZA1_PINMUX(2, 8, 2)>, /* P2_8 = ET_RXD0  */
			 <RZA1_PINMUX(2, 9, 2)>, /* P2_9 = ET_RXD1  */
			 <RZA1_PINMUX(2, 10, 2)>,/* P2_10 = ET_RXD2 */
			 <RZA1_PINMUX(2, 11, 2)>;/* P2_11 = ET_RXD3 */
	};
};

&extal_clk {
	clock-frequency = <13330000>;
};

&usb_x1_clk {
	clock-frequency = <48000000>;
};

&rtc_x1_clk {
	clock-frequency = <32768>;
};

&mtu2 {
	status = "okay";
};

&ether {
	pinctrl-names = "default";
	pinctrl-0 = <&ether_pins>;

	status = "okay";

	renesas,no-ether-link;
	phy-handle = <&phy0>;
	phy0: ethernet-phy@0 {
		compatible = "ethernet-phy-idb824.2814",
			     "ethernet-phy-ieee802.3-c22";
		reg = <0>;
	};
};

&i2c2 {
	status = "okay";
	clock-frequency = <400000>;

	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;

	eeprom@50 {
		compatible = "renesas,r1ex24128", "atmel,24c128";
		reg = <0x50>;
		pagesize = <64>;
	};
};

&rtc {
	status = "okay";
};

&scif2 {
	pinctrl-names = "default";
	pinctrl-0 = <&scif2_pins>;

	status = "okay";
};

&spi4 {
	status = "okay";

	codec: codec@0 {
		compatible = "wlf,wm8978";
		reg = <0>;
		spi-max-frequency = <5000000>;
	};
};