1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/watchdog/atmel,sama5d4-wdt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel SAMA5D4 Watchdog Timer (WDT) Controller
maintainers:
- Eugen Hristev <eugen.hristev@microchip.com>
allOf:
- $ref: "watchdog.yaml#"
properties:
compatible:
enum:
- atmel,sama5d4-wdt
- microchip,sam9x60-wdt
- microchip,sama7g5-wdt
reg:
maxItems: 1
interrupts:
maxItems: 1
atmel,watchdog-type:
$ref: /schemas/types.yaml#/definitions/string
description: should be hardware or software.
oneOf:
- description:
Enable watchdog fault reset. A watchdog fault triggers
watchdog reset.
const: hardware
- description:
Enable watchdog fault interrupt. A watchdog fault asserts
watchdog interrupt.
const: software
default: hardware
atmel,idle-halt:
$ref: /schemas/types.yaml#/definitions/flag
description: |
present if you want to stop the watchdog when the CPU is in idle state.
CAUTION: This property should be used with care, it actually makes the
watchdog not counting when the CPU is in idle state, therefore the
watchdog reset time depends on mean CPU usage and will not reset at all
if the CPU stop working while it is in idle state, which is probably
not what you want.
atmel,dbg-halt:
$ref: /schemas/types.yaml#/definitions/flag
description: |
present if you want to stop the watchdog when the CPU is in debug state.
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
watchdog@fc068640 {
compatible = "atmel,sama5d4-wdt";
reg = <0xfc068640 0x10>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 5>;
timeout-sec = <10>;
atmel,watchdog-type = "hardware";
atmel,dbg-halt;
atmel,idle-halt;
};
...
|
