1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/sound/wlf,wm8903.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: WM8903 audio codec
description: |
This device supports I2C only.
Pins on the device (for linking into audio routes):
* IN1L
* IN1R
* IN2L
* IN2R
* IN3L
* IN3R
* DMICDAT
* HPOUTL
* HPOUTR
* LINEOUTL
* LINEOUTR
* LOP
* LON
* ROP
* RON
* MICBIAS
maintainers:
- patches@opensource.cirrus.com
properties:
compatible:
const: wlf,wm8903
reg:
maxItems: 1
gpio-controller: true
'#gpio-cells':
const: 2
interrupts:
maxItems: 1
micdet-cfg:
$ref: /schemas/types.yaml#/definitions/uint32
default: 0
description: Default register value for R6 (Mic Bias).
micdet-delay:
$ref: /schemas/types.yaml#/definitions/uint32
default: 100
description: The debounce delay for microphone detection in mS.
gpio-cfg:
$ref: /schemas/types.yaml#/definitions/uint32-array
description: |
minItems: 5
maxItems: 5
A list of GPIO configuration register values.
If absent, no configuration of these registers is performed.
If any entry has the value 0xffffffff, that GPIO's
configuration will not be modified.
AVDD-supply:
description: Analog power supply regulator on the AVDD pin.
CPVDD-supply:
description: Charge pump supply regulator on the CPVDD pin.
DBVDD-supply:
description: Digital buffer supply regulator for the DBVDD pin.
DCVDD-supply:
description: Digital core supply regulator for the DCVDD pin.
required:
- compatible
- reg
- gpio-controller
- '#gpio-cells'
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
wm8903: codec@1a {
compatible = "wlf,wm8903";
reg = <0x1a>;
interrupts = <347>;
AVDD-supply = <&fooreg_a>;
CPVDD-supply = <&fooreg_b>;
DBVDD-supply = <&fooreg_c>;
DCVDD-supply = <&fooreg_d>;
gpio-controller;
#gpio-cells = <2>;
micdet-cfg = <0>;
micdet-delay = <100>;
gpio-cfg = <
0x0600 /* DMIC_LR, output */
0x0680 /* DMIC_DAT, input */
0x0000 /* GPIO, output, low */
0x0200 /* Interrupt, output */
0x01a0 /* BCLK, input, active high */
>;
};
};
|
