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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP i.MX8MP HSIO blk-ctrl
maintainers:
- Lucas Stach <l.stach@pengutronix.de>
description:
The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to
the NoC and ensuring proper power sequencing of the high-speed IO
(USB an PCIe) peripherals located in the HSIO domain of the SoC.
properties:
compatible:
items:
- const: fsl,imx8mp-hsio-blk-ctrl
- const: syscon
reg:
maxItems: 1
'#power-domain-cells':
const: 1
power-domains:
minItems: 6
maxItems: 6
power-domain-names:
items:
- const: bus
- const: usb
- const: usb-phy1
- const: usb-phy2
- const: pcie
- const: pcie-phy
'#clock-cells':
const: 0
clocks:
minItems: 2
maxItems: 2
clock-names:
items:
- const: usb
- const: pcie
interconnects:
maxItems: 4
interconnect-names:
items:
- const: noc-pcie
- const: usb1
- const: usb2
- const: pcie
required:
- compatible
- reg
- power-domains
- power-domain-names
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/imx8mp-clock.h>
#include <dt-bindings/power/imx8mp-power.h>
hsio_blk_ctrl: blk-ctrl@32f10000 {
compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon";
reg = <0x32f10000 0x24>;
clocks = <&clk IMX8MP_CLK_USB_ROOT>,
<&clk IMX8MP_CLK_PCIE_ROOT>;
clock-names = "usb", "pcie";
power-domains = <&pgc_hsiomix>, <&pgc_hsiomix>,
<&pgc_usb1_phy>, <&pgc_usb2_phy>,
<&pgc_hsiomix>, <&pgc_pcie_phy>;
power-domain-names = "bus", "usb", "usb-phy1",
"usb-phy2", "pcie", "pcie-phy";
#power-domain-cells = <1>;
#clock-cells = <0>;
};
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