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|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/power/apple,pmgr-pwrstate.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Apple SoC PMGR Power States
maintainers:
- Hector Martin <marcan@marcan.st>
allOf:
- $ref: "power-domain.yaml#"
description: |
Apple SoCs include PMGR blocks responsible for power management,
which can control various clocks, resets, power states, and
performance features. This binding describes the device power
state registers, which control power states and resets.
Each instance of a power controller within the PMGR syscon node
represents a generic power domain provider, as documented in
Documentation/devicetree/bindings/power/power-domain.yaml.
The provider controls a single SoC block. The power hierarchy is
represented via power-domains relationships between these nodes.
See Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml
for the top-level PMGR node documentation.
properties:
compatible:
items:
- enum:
- apple,t8103-pmgr-pwrstate
- apple,t6000-pmgr-pwrstate
- const: apple,pmgr-pwrstate
reg:
maxItems: 1
"#power-domain-cells":
const: 0
"#reset-cells":
const: 0
power-domains:
description:
Reference to parent power domains. A domain may have multiple parents,
and all will be powered up when it is powered.
minItems: 1
maxItems: 8 # Arbitrary, should be enough
label:
description:
Specifies the name of the SoC domain being controlled. This is used to
name the power/reset domains.
apple,always-on:
description:
Forces this power domain to always be powered up.
type: boolean
apple,min-state:
description:
Specifies the minimum power state for auto-PM.
0 = power gated, 4 = clock gated, 15 = on.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 15
required:
- compatible
- reg
- "#power-domain-cells"
- "#reset-cells"
- label
additionalProperties: false
|
