blob: 57e5270a0741c0d93d83ccd3ff88f1c16e70d483 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
|
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/edac/amazon,al-mc-edac.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amazon's Annapurna Labs Memory Controller EDAC
maintainers:
- Talel Shenhar <talel@amazon.com>
- Talel Shenhar <talelshenhar@gmail.com>
description: |
EDAC node is defined to describe on-chip error detection and correction for
Amazon's Annapurna Labs Memory Controller.
properties:
compatible:
const: amazon,al-mc-edac
reg:
maxItems: 1
"#address-cells":
const: 2
"#size-cells":
const: 2
interrupts:
minItems: 1
maxItems: 2
items:
- description: uncorrectable error interrupt
- description: correctable error interrupt
interrupt-names:
minItems: 1
maxItems: 2
items:
- const: ue
- const: ce
required:
- compatible
- reg
- "#address-cells"
- "#size-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
edac@f0080000 {
#address-cells = <2>;
#size-cells = <2>;
compatible = "amazon,al-mc-edac";
reg = <0x0 0xf0080000 0x0 0x00010000>;
interrupt-parent = <&amazon_al_system_fabric>;
interrupt-names = "ue";
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
};
};
|
