| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2017-04-04 | clk: tegra: Add missing Tegra210 clocks | Peter De Schrijver | 1 | -8/+8 |
| 2017-03-20 | clk: tegra: Add aclk | Peter De Schrijver | 1 | -0/+2 |
| 2017-03-20 | clk: tegra: Define Tegra210 DMIC sync clocks | Peter De Schrijver | 1 | -1/+8 |
| 2017-03-20 | clk: tegra: Add CEC clock | Peter De Schrijver | 1 | -1/+1 |
| 2017-03-20 | clk: tegra: Fix ISP clock modelling | Peter De Schrijver | 1 | -2/+2 |
| 2016-06-17 | clk: tegra: Enable sor1 and sor1_src on Tegra210 | Thierry Reding | 1 | -1/+1 |
| 2016-04-28 | clk: tegra: Fix pllre Tegra210 and add pll_re_out1 | Rhyland Klein | 1 | -1/+1 |
| 2016-02-02 | clk: tegra: Add the APB2APE audio clock on Tegra210 | Jon Hunter | 1 | -1/+1 |
| 2015-11-16 | clk: tegra: Add Tegra210 device tree binding | Thierry Reding | 1 | -0/+401 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |