index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
include
/
dt-bindings
/
clock
/
imx6qdl-clock.h
Age
Commit message (
Expand
)
Author
Files
Lines
2019-06-19
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Thomas Gleixner
1
-4
/
+1
2018-12-10
clk: imx6q: add DCICx clocks gate
Anson Huang
1
-1
/
+3
2018-10-17
clk: imx6q: add mmdc0 ipg clock
Anson Huang
1
-1
/
+2
2018-06-02
clk: imx6: add EPIT clock support
Colin Didier
1
-1
/
+3
2016-09-21
clk: imx6: fix i.MX6DL clock tree to reflect reality
Lucas Stach
1
-1
/
+3
2016-02-14
clk: imx: Add clock support for imx6qp
Bai Ping
1
-1
/
+15
2015-10-12
clk: imx6: Add SPDIF_GCLK clock in clock tree
Shengjiu Wang
1
-1
/
+2
2015-08-10
ARM: clk-imx6q: Add CAAM clock support
Victoria Milhoan
1
-1
/
+4
2015-03-02
ARM: imx6q: clk: Add support for mipi_ipg clock as a shared clock gate
Liu Ying
1
-1
/
+2
2015-03-02
ARM: imx6q: clk: Add support for mipi_core_cfg clock as a shared clock gate
Liu Ying
1
-1
/
+2
2015-03-02
ARM: imx6q: clk: Add the video_27m clock
Liu Ying
1
-1
/
+2
2014-10-25
ARM: i.MX6: Fix "emi" clock name typo
Steve Longerbeam
1
-4
/
+4
2014-09-16
ARM: imx: add gpt_3m clk for i.mx6qdl
Anson Huang
1
-1
/
+2
2014-09-16
ARM: imx6q: add BYPASS support for PLL clocks
Shawn Guo
1
-1
/
+26
2014-09-16
ARM: clk-imx6q: refine clock tree for ASRC
Shengjiu Wang
1
-1
/
+3
2014-09-16
ARM: clk-imx6q: refine clock tree for ESAI
Shengjiu Wang
1
-3
/
+4
2014-07-18
ARM: imx6qdl: switch to use macro for clock ID
Shawn Guo
1
-0
/
+224