starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2007-10-12	[MIPS] Split up war.h	Ralf Baechle	1	-0/+25
2007-10-12	[MIPS] GT64120: Remove unused definitions	Yoichi Yuasa	1	-9/+0
2007-07-10	[MIPS] Early check for SMTC kernel on non-MT processor	Chris Dearman	1	-0/+52
2007-03-04	[MIPS] SNI: Fix mc146818_decode_year	Thomas Bogendoerfer	1	-1/+1
2007-02-06	[MIPS] Define MIPS_CPU_IRQ_BASE in generic header	Atsushi Nemoto	1	-0/+2
2006-07-14	[MIPS] Use the proper technical term for naming some of the cache macros.	Ralf Baechle	1	-2/+2
2006-06-29	[PATCH] genirq: cleanup: turn ARCH_HAS_IRQ_PER_CPU into CONFIG_IRQ_PER_CPU	Ingo Molnar	1	-6/+0
2006-06-21	Merge git://git.infradead.org/hdrcleanup-2.6	Linus Torvalds	2	-2/+0
2006-06-19	[MIPS] Make timer interrupt frequency configurable from kconfig.	Atsushi Nemoto	1	-13/+0
2006-06-19	[MIPS] Fix R4K cache macro names	Kumba	1	-2/+2
2006-04-26	Don't include linux/config.h from anywhere else in include/	David Woodhouse	2	-2/+0
2006-04-19	[MIPS] MIPS boards: Set HZ to 100.	Ralf Baechle	1	-0/+13
2006-03-21	[PATCH] USB: EHCI for AU1200	Jordan Crouse	1	-0/+4
2005-10-29	Fixup a few lose ends in explicit support for MIPS R1/R2.	Ralf Baechle	1	-2/+2
2005-10-29	Cleanup the mess in cpu_cache_init.	Ralf Baechle	1	-2/+2
2005-10-29	SMP on Malta needs to define ARCH_HAS_IRQ_PER_CPU since 2.6.14-rc1.	Ralf Baechle	1	-0/+14
2005-10-29	Define cpu_icache_snoops_remote_store. This is slight abuse of something	Ralf Baechle	1	-0/+2
2005-10-29	Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32\|64}_R1.	Ralf Baechle	1	-2/+2
2005-04-17	Linux-2.6.12-rc2	Linus Torvalds	3	-0/+143