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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
pinctrl
/
sunxi
/
pinctrl-sunxi.h
Age
Commit message (
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)
Author
Files
Lines
2022-07-18
pinctrl: sunxi: Add driver for Allwinner D1
Samuel Holland
1
-0
/
+6
2022-07-18
pinctrl: sunxi: Make some layout parameters dynamic
Samuel Holland
1
-0
/
+3
2022-07-18
pinctrl: sunxi: Refactor register/offset calculation
Samuel Holland
1
-89
/
+4
2022-07-18
pinctrl: sunxi: Support the 2.5V I/O bias mode
Samuel Holland
1
-0
/
+7
2019-08-05
pinctrl: sunxi: v3s: introduce support for V3
Icenowy Zheng
1
-0
/
+2
2019-04-23
pinctrl: sunxi: Support I/O bias voltage setting on H6
Ondrej Jirman
1
-0
/
+7
2019-04-23
pinctrl: sunxi: Prepare for alternative bias voltage setting methods
Ondrej Jirman
1
-1
/
+10
2019-02-11
pinctrl: sunxi: Support I/O bias voltage setting on A80
Chen-Yu Tsai
1
-0
/
+12
2019-01-14
pinctrl: sunxi: Consider pin_base when calculating regulator array index
Chen-Yu Tsai
1
-1
/
+1
2018-12-14
pinctrl: sunxi: Deal with per-bank regulators
Maxime Ripard
1
-0
/
+6
2018-03-27
pinctrl: sunxi: change irq_bank_base to irq_bank_map
Icenowy Zheng
1
-2
/
+5
2018-03-27
pinctrl: sunxi: introduce IRQ bank conversion function
Icenowy Zheng
1
-11
/
+12
2018-03-27
pinctrl: sunxi: refactor irq related register function to have desc
Icenowy Zheng
1
-8
/
+18
2017-10-31
pinctrl: sunxi: Introduce the strict flag
Maxime Ripard
1
-0
/
+1
2017-05-29
pinctrl: sunxi: Add SoC ID definitions for A10, A20 and R40 SoCs
Icenowy Zheng
1
-0
/
+3
2017-03-16
pinctrl: sunxi: make use of raw_spinlock variants
Julia Cartwright
1
-1
/
+1
2017-02-06
pinctrl: sunxi: Support A31/A31s with pinctrl variants
Chen-Yu Tsai
1
-0
/
+2
2017-01-09
pinctrl: sunxi: Add common sun5i pinctrl driver
Maxime Ripard
1
-0
/
+4
2017-01-09
pinctrl: sunxi: Add pinctrl variants
Maxime Ripard
1
-2
/
+24
2016-11-15
pinctrl: sunxi: Add support for interrupt debouncing
Maxime Ripard
1
-0
/
+7
2016-11-15
pinctrl: sunxi: Add support for fetching pinconf settings from hardware
Chen-Yu Tsai
1
-1
/
+0
2016-03-30
pinctrl: sunxi: Fix A33 external interrupts not working
Hans de Goede
1
-10
/
+11
2015-03-18
pinctrl: sun4i: GPIOs configured as irq must be set to input before reading
Hans de Goede
1
-0
/
+4
2014-10-30
pinctrl: sunxi: Add PN bank base pin
Maxime Ripard
1
-0
/
+1
2014-06-19
pinctrl: sunxi: Implement multiple interrupt banks support
Maxime Ripard
1
-9
/
+25
2014-06-19
pinctrl: sunxi: Declare the number of interrupt banks in the descriptor
Maxime Ripard
1
-0
/
+1
2014-06-19
pinctrl: sunxi: Add macro definition for pinctrl with more than one interrupt
Maxime Ripard
1
-0
/
+9
2014-05-04
pinctrl: sunxi: Libraryse the driver
Maxime Ripard
1
-0
/
+3
2014-05-04
pinctrl: sunxi: Replace hardcoded pin defines by a macro
Maxime Ripard
1
-362
/
+2
2014-05-04
pinctrl: sunxi: Move the Allwinner pinctrl driver to its own directory
Maxime Ripard
1
-0
/
+615