index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
pinctrl
/
aspeed
Age
Commit message (
Expand
)
Author
Files
Lines
2017-08-31
pinctrl: aspeed: Rework strap register write logic for the AST2500
Andrew Jeffery
1
-10
/
+16
2017-08-22
pinctrl: aspeed: Fix ast2500 strap register write logic
Yong Li
2
-2
/
+18
2017-08-22
pinctrl: aspeed: g5: constify pinconf_ops, pinctrl_ops, and pinmux_ops struct...
Julia Lawall
1
-3
/
+3
2017-08-22
pinctrl: aspeed: g4: constify pinconf_ops, pinctrl_ops, and pinmux_ops struct...
Julia Lawall
1
-2
/
+2
2017-08-14
pinctrl: aspeed: g5: Add USB device and host support
Andrew Jeffery
1
-1
/
+57
2017-08-14
pinctrl: aspeed: g4: Add USB device and host support
Andrew Jeffery
1
-7
/
+59
2017-04-24
pinctrl: aspeed: g5: Add pinconf support
Andrew Jeffery
1
-1
/
+152
2017-04-24
pinctrl: aspeed: g4: Add pinconf support
Andrew Jeffery
1
-1
/
+116
2017-04-24
pinctrl: aspeed: Add core pinconf support
Andrew Jeffery
2
-0
/
+239
2017-04-11
pinctrl: aspeed: Fix unused-const-variable warnings
Andrew Jeffery
1
-6
/
+6
2017-03-14
pinctrl: aspeed: Allow disabling Port D and Port E loopback mode
Rick Altherr
1
-2
/
+12
2017-01-26
pinctrl: aspeed: g4: Fix mux configuration for GPIOs AA[4-7], AB[0-7]
Andrew Jeffery
1
-16
/
+16
2016-12-28
pinctrl: aspeed: Fix kerneldoc return descriptions
Andrew Jeffery
1
-6
/
+6
2016-12-28
pinctrl: aspeed-g5: Add mux configuration for all pins
Andrew Jeffery
2
-4
/
+1475
2016-12-28
pinctrl: aspeed-g4: Add mux configuration for all pins
Andrew Jeffery
1
-13
/
+1084
2016-12-28
pinctrl: aspeed: Read and write bits in LPC and GFX controllers
Andrew Jeffery
4
-88
/
+171
2016-11-07
pinctrl-aspeed-g5: Never set SCU90[6]
Andrew Jeffery
1
-1
/
+1
2016-10-18
pinctrl: aspeed-g5: Fix pin association of SPI1 function
Andrew Jeffery
1
-8
/
+78
2016-10-18
pinctrl: aspeed-g5: Fix GPIOE1 typo
Andrew Jeffery
1
-1
/
+1
2016-10-18
pinctrl: aspeed-g5: Fix names of GPID2 pins
Andrew Jeffery
1
-6
/
+6
2016-10-18
pinctrl: aspeed: "Not enabled" is a significant mux state
Andrew Jeffery
1
-5
/
+7
2016-09-13
pinctrl: aspeed: fix regmap error handling
Arnd Bergmann
1
-3
/
+3
2016-09-07
pinctrl: Add pinctrl-aspeed-g5 driver
Andrew Jeffery
3
-0
/
+817
2016-09-07
pinctrl: Add pinctrl-aspeed-g4 driver
Andrew Jeffery
3
-0
/
+1240
2016-09-07
pinctrl: Add core support for Aspeed SoCs
Andrew Jeffery
4
-0
/
+1079