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path: root/drivers/net/phy/mediatek
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2025-05-28net: phy: mediatek: Add Airoha AN7583 PHY supportChristian Marangi1-0/+20
Add Airoha AN7583 PHY support based on Airoha AN7581 with the small difference that BMCR_PDOWN is enabled by default and needs to be cleared to make the internal PHY correctly work. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20250522165313.6411-4-ansuelsmth@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-21net: phy: mediatek: add driver for built-in 2.5G ethernet PHY on MT7988Sky Huang3-0/+333
Add support for internal 2.5Gphy on MT7988. This driver will load necessary firmware and add appropriate time delay to make sure that firmware works stably. The firmware loading procedure takes about 11ms in this driver. Signed-off-by: Sky Huang <skylake.huang@mediatek.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20250516102327.2014531-3-SkyLake.Huang@mediatek.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-21net: phy: mediatek: Sort config and file names in Kconfig and MakefileSky Huang2-4/+4
Sort config and file names in Kconfig and Makefile in drivers/net/phy/mediatek/ in alphabetical order. Signed-off-by: Sky Huang <skylake.huang@mediatek.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20250516102327.2014531-2-SkyLake.Huang@mediatek.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-17net: phy: mediatek: do not require syscon compatible for pio propertyFrank Wunderlich1-1/+9
Current implementation requires syscon compatible for pio property which is used for driving the switch leds on mt7988. Replace syscon_regmap_lookup_by_phandle with of_parse_phandle and device_node_to_regmap to get the regmap already assigned by pinctrl driver. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://patch.msgid.link/20250510174933.154589-1-linux@fw-web.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-17net: phy: mediatek: init val in .phy_led_polarity_set for AN7581Christian Marangi1-2/+1
Fix smatch warning for uninitialised val in .phy_led_polarity_set for AN7581 driver. Correctly init to 0 to set polarity high by default. Reported-by: Simon Horman <horms@kernel.org> Fixes: 6a325aed130b ("net: phy: mediatek: add Airoha PHY ID to SoC driver") Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Link: https://patch.msgid.link/20250415105313.3409-1-ansuelsmth@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-12net: phy: mediatek: add Airoha PHY ID to SoC driverChristian Marangi2-1/+65
Airoha AN7581 SoC ship with a Switch based on the MT753x Switch embedded in other SoC like the MT7581 and the MT7988. Similar to these they require configuring some pin to enable LED PHYs. Add support for the PHY ID for the Airoha embedded Switch and define a simple probe function to toggle these pins. Also fill the LED functions and add dedicated function to define LED polarity. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Link: https://patch.msgid.link/20250410100410.348-2-ansuelsmth@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-12net: phy: mediatek: permit to compile test GE SOC PHY driverChristian Marangi1-2/+1
When commit 462a3daad679 ("net: phy: mediatek: fix compile-test dependencies") fixed the dependency, it should have also introduced an or on COMPILE_TEST to permit this driver to be compile-tested even if NVMEM_MTK_EFUSE wasn't selected. The driver makes use of NVMEM API that are always compiled (return error) so the driver can actually be compiled even without that config. Fix and simplify the dependency condition of this kernel config. Fixes: 462a3daad679 ("net: phy: mediatek: fix compile-test dependencies") Acked-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://patch.msgid.link/20250410100410.348-1-ansuelsmth@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-03-06net: phy: mediatek: use new phy_package_shared gettersHeiner Kallweit1-3/+4
Use the new getters for members of struct phy_package_shared. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Link: https://patch.msgid.link/356a257f-68d0-47bc-a474-4dafaeaa149f@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-02-18net: phy: mediatek: Move some macros to phy-lib for later useSky Huang2-4/+4
Move some macros to phy-lib because MediaTek's 2.5G built-in ethernet PHY will also use them. Signed-off-by: Sky Huang <skylake.huang@mediatek.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20250213080553.921434-6-SkyLake.Huang@mediatek.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-02-18net: phy: mediatek: Add token ring clear bit operation supportSky Huang3-12/+27
Similar to __mtk_tr_set_bits() support. Previously in mtk-ge-soc.c, we clear some register bits via token ring, which were also implemented in three __phy_write(). Now we can do the same thing via __mtk_tr_clr_bits() helper. Signed-off-by: Sky Huang <skylake.huang@mediatek.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20250213080553.921434-5-SkyLake.Huang@mediatek.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-02-18net: phy: mediatek: Add token ring set bit operation supportSky Huang3-4/+15
Previously in mtk-ge-soc.c, we set some register bits via token ring, which were implemented in three __phy_write(). Now we can do the same thing via __mtk_tr_set_bits() helper. Signed-off-by: Sky Huang <skylake.huang@mediatek.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20250213080553.921434-4-SkyLake.Huang@mediatek.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-02-18net: phy: mediatek: Add token ring access helper functions in mtk-phy-libSky Huang4-80/+230
This patch adds TR(token ring) manipulations and adds correct macro names for those magic numbers. TR is a way to access proprietary registers on page 52b5. Use these helper functions so we can see which fields we're going to modify/set/clear. TR functions with __* prefix mean that the operations inside aren't wrapped by page select/restore functions. This patch doesn't really change registers' settings but just enhances readability and maintainability. Signed-off-by: Sky Huang <skylake.huang@mediatek.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20250213080553.921434-3-SkyLake.Huang@mediatek.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-02-18net: phy: mediatek: Change to more meaningful macrosSky Huang3-17/+57
Replace magic number with more meaningful macros in mtk-ge.c. Also, move some common macros into mtk-phy-lib.c. Signed-off-by: Sky Huang <skylake.huang@mediatek.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20250213080553.921434-2-SkyLake.Huang@mediatek.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-01-15net: phy: Constify struct mdio_device_idChristophe JAILLET2-2/+2
'struct mdio_device_id' is not modified in these drivers. Constifying these structures moves some data to a read-only section, so increase overall security. On a x86_64, with allmodconfig, as an example: Before: ====== text data bss dec hex filename 27014 12792 0 39806 9b7e drivers/net/phy/broadcom.o After: ===== text data bss dec hex filename 27206 12600 0 39806 9b7e drivers/net/phy/broadcom.o Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/403c381b7d9156b67ad68ffc44b8eee70c5e86a9.1736691226.git.christophe.jaillet@wanadoo.fr Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-11-13net: phy: mediatek: add MT7530 & MT7531's PHY ID macrosSkyLake.Huang1-4/+7
This patch adds MT7530 & MT7531's PHY ID macros in mtk-ge.c so that it follows the same rule of mtk-ge-soc.c. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13net: phy: mediatek: Integrate read/write page helper functionsSkyLake.Huang5-28/+26
This patch integrates read/write page helper functions as MTK phy lib. They are basically the same in mtk-ge.c & mtk-ge-soc.c. Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13net: phy: mediatek: Improve readability of mtk-phy-lib.c's ↵SkyLake.Huang1-20/+24
mtk_phy_led_hw_ctrl_set() This patch removes parens around TRIGGER_NETDEV_RX/TRIGGER_NETDEV_TX in mtk_phy_led_hw_ctrl_set(), which improves readability. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13net: phy: mediatek: Move LED helper functions into mtk phy libSkyLake.Huang5-255/+370
This patch creates mtk-phy-lib.c & mtk-phy.h and integrates mtk-ge-soc.c's LED helper functions so that we can use those helper functions in other MTK's ethernet phy driver. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13net: phy: mediatek: Re-organize MediaTek ethernet phy driversSkyLake.Huang4-0/+1746
Re-organize MediaTek ethernet phy driver files and get ready to integrate some common functions and add new 2.5G phy driver. mtk-ge.c: MT7530 Gphy on MT7621 & MT7531 Gphy mtk-ge-soc.c: Built-in Gphy on MT7981 & Built-in switch Gphy on MT7988 mtk-2p5ge.c: Planned for built-in 2.5G phy on MT7988 Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
generated by cgit v1.2.3 (git 2.39.0) at 2025-08-22 12:12:31 +0300