starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2019-11-21	PCI: Remove unused includes and superfluous struct declaration	Krzysztof Wilczynski	1	-0/+1
2019-06-19	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234	Thomas Gleixner	1	-12/+1
2019-04-04	acpi: Create subtable parsing infrastructure	Keith Busch	1	-1/+1
2018-07-27	irqchip/gic-v3-its: Reduce minimum LPI allocation to 1 for PCI devices	Marc Zyngier	1	-3/+11
2018-07-16	irqchip/gic-v3-its: Move minimum LPI requirements to individual busses	Marc Zyngier	1	-2/+4
2018-02-16	irqchip/gic-v3: Ignore disabled ITS nodes	Stephen Boyd	1	-0/+2
2017-08-23	irqchip: Convert to using %pOF instead of full_name	Rob Herring	1	-1/+1
2017-06-22	irqchip/gic-v3-its: Fix MSI alias accounting	Robin Murphy	1	-18/+17
2016-09-12	irqchip/gicv3-its: Use MADT ITS subtable to do PCI/MSI domain initialization	Tomasz Nowicki	1	-0/+44
2016-09-12	irqchip/gicv3-its: Factor out PCI-MSI part that might be reused for ACPI	Tomasz Nowicki	1	-15/+29
2015-10-16	irqchip/gic-v3-its: Add handling of PCI requester id.	David Daney	1	-3/+1
2015-10-13	irqdomain/msi: Use fwnode instead of of_node	Marc Zyngier	1	-1/+2
2015-10-02	irqchip/gic-v3-its: Count additional LPIs for the aliased devices	Marc Zyngier	1	-1/+1
2015-07-30	irqchip/gicv3-its: Make the PCI/MSI code standalone	Marc Zyngier	1	-6/+41
2015-07-30	irqchip/gicv3-its: Split PCI/MSI code from the core ITS driver	Marc Zyngier	1	-0/+105