index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
hwtracing
/
intel_th
/
pci.c
Age
Commit message (
Expand
)
Author
Files
Lines
2017-09-22
intel_th: pci: Add Lewisburg PCH support
Alexander Shishkin
1
-0
/
+5
2017-09-22
intel_th: pci: Add Cedar Fork PCH support
Alexander Shishkin
1
-0
/
+5
2017-08-25
intel_th: Perform time resync on capture start
Alexander Shishkin
1
-3
/
+53
2017-08-25
intel_th: pci: Use drvdata for quirks
Alexander Shishkin
1
-1
/
+2
2017-08-25
intel_th: pci: Add Cannon Lake PCH-LP support
Alexander Shishkin
1
-0
/
+5
2017-08-25
intel_th: pci: Add Cannon Lake PCH-H support
Alexander Shishkin
1
-0
/
+5
2017-08-25
intel_th: pci: Enable bus mastering
Alexander Shishkin
1
-0
/
+2
2017-03-15
intel_th: pci: Add Gemini Lake support
Alexander Shishkin
1
-0
/
+5
2017-03-15
intel_th: pci: Add Denverton SOC support
Alexander Shishkin
1
-0
/
+5
2016-07-14
intel_th: pci: Add Kaby Lake PCH-H support
Alexander Shishkin
1
-0
/
+5
2016-04-19
intel_th: pci: Add Broxton-M SOC support
Alexander Shishkin
1
-0
/
+5
2016-02-21
intel_th: Set root device's drvdata early
Alexander Shishkin
1
-2
/
+0
2016-02-08
intel_th: pci: Add Broxton SOC support
Alexander Shishkin
1
-0
/
+5
2016-02-08
intel_th: pci: Add Apollo Lake SOC support
Alexander Shishkin
1
-0
/
+5
2015-10-04
intel_th: Add pci glue layer for Intel(R) Trace Hub
Alexander Shishkin
1
-0
/
+86