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path: root/drivers/gpu/host1x/hw
AgeCommit message (Expand)AuthorFilesLines
2022-07-08gpu: host1x: Initialize syncval in channel_submit()Mikko Perttunen1-0/+1
2022-07-08gpu: host1x: Add MLOCK release code on Tegra234Mikko Perttunen2-0/+41
2022-07-08gpu: host1x: Rewrite job opcode sequenceMikko Perttunen1-59/+85
2022-07-08gpu: host1x: Tegra234 device data and headersMikko Perttunen8-0/+310
2022-07-08gpu: host1x: Program interrupt destinations on Tegra234Mikko Perttunen1-0/+11
2022-07-08gpu: host1x: Deduplicate hardware headersMikko Perttunen7-703/+156
2022-07-08gpu: host1x: Program context stream ID on submissionMikko Perttunen3-4/+68
2021-12-16gpu: host1x: Add initial runtime PM and OPP supportDmitry Osipenko1-22/+22
2021-08-13gpu: host1x: debug: Dump DMASTART and DMAEND registerThierry Reding2-3/+21
2021-08-13gpu: host1x: debug: Dump only relevant parts of CDMA push bufferThierry Reding1-10/+7
2021-08-13gpu: host1x: debug: Use dma_addr_t more consistentlyThierry Reding1-4/+4
2021-08-10gpu: host1x: Add support for syncpoint waits in CDMA pushbufferMikko Perttunen7-22/+132
2021-08-10gpu: host1x: Add no-recovery modeMikko Perttunen1-1/+1
2021-03-31gpu: host1x: Fix Tegra194 syncpt interrupt thresholdJon Hunter1-1/+1
2021-03-31gpu: host1x: Cleanup and refcounting for syncpointsMikko Perttunen3-8/+6
2020-07-17gpu: host1x: debug: Dump push buffer stateDmitry Osipenko1-0/+6
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282Thomas Gleixner3-30/+3
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201Thomas Gleixner40-498/+40
2019-04-11gpu: host1x: Program stream ID to bypass without SMMUArnd Bergmann1-2/+6
2019-04-11gpu: host1x: Fix compile error when IOMMU API is not availableStefan Agner1-1/+1
2019-02-07gpu: host1x: Continue CDMA execution starting with a next jobDmitry Osipenko1-14/+0
2019-02-07gpu: host1x: Use correct semantics for HOST1X_CHANNEL_DMAENDThierry Reding1-2/+2
2019-02-07gpu: host1x: Support 40-bit addressingThierry Reding4-10/+62
2019-02-07gpu: host1x: Program the channel stream IDThierry Reding5-0/+37
2018-11-29gpu: host1x: Add Tegra194 supportThierry Reding8-1/+481
2018-11-27gpu: host1x: Fix syncpoint ID field size on Tegra186Thierry Reding1-1/+1
2018-11-27gpu: host1x: Resize channel register region on Tegra186 and laterThierry Reding1-2/+5
2018-05-18gpu: host1x: Drop unnecessary host1x argumentThierry Reding1-1/+1
2018-05-18gpu: host1x: Remove wait check supportThierry Reding2-13/+1
2017-10-20gpu: host1x: Disassemble more instructionsMikko Perttunen3-6/+58
2017-10-20gpu: host1x: Improve debug disassembly formattingMikko Perttunen3-25/+38
2017-10-20gpu: host1x: Enable gather filterMikko Perttunen3-0/+46
2017-10-20gpu: host1x: Enable Tegra186 syncpoint protectionMikko Perttunen2-0/+48
2017-10-20gpu: host1x: Add Tegra186 supportMikko Perttunen15-162/+820
2017-08-17gpu: host1x: Fix bitshift/mask multipliersMikko Perttunen2-13/+13
2017-06-15gpu: host1x: Refactor channel allocation codeMikko Perttunen1-4/+0
2017-04-05gpu: host1x: Add IOMMU supportMikko Perttunen1-9/+7
2016-06-23gpu: host1x: Remove redundant parenthesesThierry Reding1-1/+1
2016-06-23gpu: host1x: Whitespace cleanup for readabilityThierry Reding5-17/+23
2016-06-23gpu: host1x: Fix a couple of checkpatch warningsThierry Reding2-4/+5
2016-06-23gpu: host1x: Use unsigned int consistently for IDsThierry Reding4-9/+13
2016-06-23gpu: host1x: Consistently use unsigned int for countsThierry Reding4-11/+14
2016-06-23gpu: host1x: hw: intr_hw: Remove create_workqueueBhaktipriya Shridhar1-2/+6
2016-05-28remove lots of IS_ERR_VALUE abusesArnd Bergmann1-1/+1
2015-12-14gpu: host1x: Add Tegra210 supportThierry Reding6-0/+755
2015-10-02gpu: host1x: Fix MLOCK's debug infoDmitry Osipenko4-13/+13
2014-11-13gpu: host1x: Print address/offset pairs consistentlyThierry Reding2-4/+4
2014-11-13gpu: host1x: Fix typo in commentThierry Reding1-1/+1
2014-11-13gpu: host1x: Make mapped field of push buffers void *Thierry Reding1-2/+2
2014-11-13gpu: host1x: Use struct host1x_bo pointers in tracesThierry Reding1-4/+8
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