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path: root/drivers/gpu/drm/renesas/rz-du/rzg2l_du_encoder.c
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2024-12-10drm: renesas: rz-du: rzg2l_du_encoder: Fix max dot clock for DPIBiju Das1-0/+18
As per the RZ/G2UL hardware manual Table 33.4 Clock List, the maximum dot clock for the DPI interface is 83.5 MHz. Add mode_valid callback to reject modes greater than 83.5 MHz. Suggested-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241022082433.32513-3-biju.das.jz@bp.renesas.com
2024-02-21drm: renesas: Add RZ/G2L DU SupportBiju Das1-0/+72
The LCD controller is composed of Frame Compression Processor (FCPVD), Video Signal Processor (VSPD), and Display Unit (DU). It has DPI/DSI interfaces and supports a maximum resolution of 1080p along with 2 RPFs to support the blending of two picture layers and raster operations (ROPs). The DU module is connected to VSPD. Add RZ/G2L DU support for RZ/G2L alike SoCs. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20240218164840.57662-4-biju.das.jz@bp.renesas.com Signed-off-by: Maxime Ripard <mripard@kernel.org>