| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2022-05-07 | drm/msm/dsi: pll_7nm: remove unsupported dividers for DSI pixel clock | Dmitry Baryshkov | 1 | -6/+4 |
| 2022-02-18 | drm/msm/dsi/phy: fix 7nm v4.0 settings for C-PHY mode | Dmitry Baryshkov | 1 | -8/+14 |
| 2022-02-18 | drm/msm/dsi: Use "ref" fw clock instead of global name for VCO parent | Marijn Suijten | 1 | -1/+3 |
| 2021-10-15 | drm/msm/dsi: Use division result from div_u64_rem in 7nm and 14nm PLL | Marijn Suijten | 1 | -3/+1 |
| 2021-08-11 | drm/msm/dsi: add continuous clock support for 7nm PHY | Dmitry Baryshkov | 1 | -0/+17 |
| 2021-08-07 | drm/msm/dsi: rename dual DSI to bonded DSI | Dmitry Baryshkov | 1 | -1/+1 |
| 2021-08-07 | drm/msm/dsi: Add PHY configuration for SC7280 | Rajeev Nandan | 1 | -0/+26 |
| 2021-08-07 | drm/msm/dsi: support CPHY mode for 7nm pll/phy | Jonathan Marek | 1 | -43/+102 |
| 2021-06-23 | drm/msm: Generated register update | Rob Clark | 1 | -0/+1 |
| 2021-06-23 | drm/msm/dsi: fix 32-bit clang warning | Arnd Bergmann | 1 | -1/+5 |
| 2021-06-10 | drm/msm/dsi: Stash away calculated vco frequency on recalc | Stephen Boyd | 1 | -0/+1 |
| 2021-04-07 | drm/msm/dsi: stop passing src_pll_id to the phy_enable call | Dmitry Baryshkov | 1 | -1/+1 |
| 2021-04-07 | drm/msm/dsi: inline msm_dsi_phy_set_src_pll | Dmitry Baryshkov | 1 | -2/+0 |
| 2021-04-07 | drm/msm/dsi: remove temp data from global pll structure | Dmitry Baryshkov | 1 | -110/+56 |
| 2021-04-07 | drm/msm/dsi: remove duplicate fields from dsi_pll_Nnm instances | Dmitry Baryshkov | 1 | -37/+31 |
| 2021-04-07 | drm/msm/dsi: move ioremaps to dsi_phy_driver_probe | Dmitry Baryshkov | 1 | -47/+32 |
| 2021-04-07 | drm/msm/dsi: drop PLL accessor functions | Dmitry Baryshkov | 1 | -70/+70 |
| 2021-04-07 | drm/msm/dsi: drop msm_dsi_pll abstraction | Dmitry Baryshkov | 1 | -35/+39 |
| 2021-04-07 | drm/msm/dsi: make save_state/restore_state callbacks accept msm_dsi_phy | Dmitry Baryshkov | 1 | -13/+11 |
| 2021-04-07 | drm/msm/dsi: drop vco_delay setting from 7nm, 10nm, 14nm drivers | Dmitry Baryshkov | 1 | -3/+0 |
| 2021-04-07 | drm/msm/dsi: make save/restore_state phy-level functions | Dmitry Baryshkov | 1 | -1/+1 |
| 2021-04-07 | drm/msm/dsi: use devm_clk_*register to registe DSI PHY clocks | Dmitry Baryshkov | 1 | -68/+16 |
| 2021-04-07 | drm/msm/dsi: push provided clocks handling into a generic code | Dmitry Baryshkov | 1 | -51/+4 |
| 2021-04-07 | drm/msm/dsi: remove msm_dsi_pll_set_usecase | Dmitry Baryshkov | 1 | -3/+1 |
| 2021-04-07 | drm/msm/dsi: move min/max PLL rate to phy config | Dmitry Baryshkov | 1 | -8/+4 |
| 2021-04-07 | drm/msm/dsi: drop global msm_dsi_phy_type enumaration | Dmitry Baryshkov | 1 | -9/+11 |
| 2021-04-07 | drm/msm/dsi: move all PLL callbacks into PHY config struct | Dmitry Baryshkov | 1 | -17/+32 |
| 2021-04-07 | drm/msm/dsi: fuse dsi_pll_* code into dsi_phy_* code | Dmitry Baryshkov | 1 | -0/+905 |
| 2021-04-07 | drm/msm/dsi: replace PHY's init callback with configurable data | Dmitry Baryshkov | 1 | -17/+2 |
| 2020-11-04 | drm/msm/dsi_phy_7nm: implement PHY disabling | Dmitry Baryshkov | 1 | -1/+22 |
| 2020-09-12 | drm/msm/dsi: add support for 7nm DSI PHY/PLL | Jonathan Marek | 1 | -0/+255 |
