summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/msm/disp/dpu1/catalog
AgeCommit message (Expand)AuthorFilesLines
2025-05-12drm/msm/dpu: remove DPU_CTL_SPLIT_DISPLAY from SAR2130P CTL blocksDmitry Baryshkov1-3/+2
2025-05-02drm/msm/dpu: remove DSC feature bit for PINGPONG on SDM630Dmitry Baryshkov1-2/+2
2025-05-02drm/msm/dpu: drop TE2 definitionsDmitry Baryshkov5-18/+18
2025-05-02drm/msm/dpu: remove DSC feature bit for PINGPONG on MSM8953Dmitry Baryshkov1-2/+0
2025-05-02drm/msm/dpu: remove DSC feature bit for PINGPONG on MSM8917Dmitry Baryshkov1-1/+0
2025-05-02drm/msm/dpu: remove DSC feature bit for PINGPONG on MSM8937Dmitry Baryshkov1-2/+0
2025-05-02drm/msm/dpu: add catalog entry for SAR2130PDmitry Baryshkov1-0/+434
2025-05-02drm/msm/dpu: rename non-SmartDMA feature masks to be more explicitDmitry Baryshkov7-21/+21
2025-05-02drm/msm/dpu: enable SmartDMA on SM8550Dmitry Baryshkov1-10/+10
2025-05-02drm/msm/dpu: enable SmartDMA on SC8280XPDmitry Baryshkov1-8/+8
2025-05-02drm/msm/dpu: enable SmartDMA on SC8180XDmitry Baryshkov1-8/+8
2025-05-02drm/msm/dpu: enable SmartDMA on SM8150Dmitry Baryshkov1-8/+8
2025-05-01drm/msm/dpu: remove DPU_CTL_SPLIT_DISPLAY from CTL blocks on DPU >= 5.0Dmitry Baryshkov11-31/+22
2025-04-10drm/msm/dpu: drop rogue intr_tear_rd_ptr valuesDmitry Baryshkov6-15/+0
2025-03-06drm/msm/dpu: Support YUV formats on writeback for DPU 5.x+Jessica Zhang12-24/+24
2025-03-05drm/msm/dpu: enable CDM_0 for X Elite platformDmitry Baryshkov1-0/+1
2025-03-05drm/msm/dpu: enable CDM_0 for SC8280XP platformDmitry Baryshkov1-0/+1
2025-03-05drm/msm/dpu: enable CDM_0 for DPUs 1.x - 4.xDmitry Baryshkov9-0/+9
2025-03-05drm/msm/dpu: enable CDM_0 for DPUs 5.x+Dmitry Baryshkov11-0/+11
2025-03-05drm/msm/dpu: rename CDM block definitionDmitry Baryshkov3-3/+3
2025-02-25drm/msm/dpu: Add writeback support for SM6150Fange Zhang1-0/+18
2025-02-15drm/msm/dpu: correct LM pairing for SM6150Dmitry Baryshkov1-2/+0
2025-02-15drm/msm/dpu: enable DPU_WB_INPUT_CTRL for DPU 5.xDmitry Baryshkov3-3/+3
2024-12-24drm/msm/dpu: Specify dedicated CWB pingpong blocksJessica Zhang5-12/+12
2024-12-24drm/msm/dpu: Add CWB entry to catalog for SM8650Esha Bharadwaj1-0/+21
2024-12-24drm/msm/dpu: link DSPP_2/_3 blocks on X1E80100Dmitry Baryshkov1-0/+2
2024-12-24drm/msm/dpu: link DSPP_2/_3 blocks on SM8650Dmitry Baryshkov1-0/+2
2024-12-24drm/msm/dpu: link DSPP_2/_3 blocks on SM8550Dmitry Baryshkov1-0/+2
2024-12-24drm/msm/dpu: link DSPP_2/_3 blocks on SM8350Dmitry Baryshkov1-0/+2
2024-12-24drm/msm/dpu: link DSPP_2/_3 blocks on SM8250Dmitry Baryshkov1-0/+2
2024-12-24drm/msm/dpu: link DSPP_2/_3 blocks on SC8180XDmitry Baryshkov1-0/+2
2024-12-24drm/msm/dpu: link DSPP_2/_3 blocks on SM8150Dmitry Baryshkov1-0/+2
2024-12-24drm/msm/dpu: provide DSPP and correct LM config for SDM670Dmitry Baryshkov1-2/+52
2024-12-15drm/msm/dpu: Add SM6150 supportLi Liu1-0/+254
2024-12-04drm/msm/dpu: fix x1e80100 intf_6 underrun/vsync interruptStephan Gerhold1-2/+2
2024-10-21drm/msm/dpu: Add SA8775P supportMahadevan1-0/+485
2024-10-21drm/msm/dpu: drop LM_3 / LM_4 on MSM8998Dmitry Baryshkov1-12/+0
2024-10-21drm/msm/dpu: drop LM_3 / LM_4 on SDM845Dmitry Baryshkov1-12/+0
2024-10-21drm/msm/dpu: on SDM845 move DSPP_3 to LM_5 blockDmitry Baryshkov1-1/+1
2024-10-21drm/msm/dpu: Add support for MSM8917Dmitry Baryshkov1-0/+187
2024-10-21drm/msm/dpu: Add support for MSM8937Dmitry Baryshkov1-0/+210
2024-10-21drm/msm/dpu: Add support for MSM8953Dmitry Baryshkov1-0/+218
2024-10-21drm/msm/dpu: Add support for MSM8996Konrad Dybcio1-0/+338
2024-09-02drm/msm/dpu: enable writeback on SM6350Dmitry Baryshkov1-0/+18
2024-09-02drm/msm/dpu: enable writeback on SM6125Dmitry Baryshkov1-0/+18
2024-09-02drm/msm/dpu: enable writeback on SC8108XDmitry Baryshkov1-0/+18
2024-09-02drm/msm/dpu: enable writeback on SM8150Dmitry Baryshkov1-0/+18
2024-06-23drm/msm/dpu: Add SM7150 supportDanila Tikhonov1-0/+335
2024-03-29drm/msm/dp: assign correct DP controller ID to x1e80100 interface tableKuogee Hsieh1-3/+31
2024-02-23drm/msm/dpu: Add X1E80100 supportAbel Vesa1-0/+449
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-03 13:59:59 +0300