Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2018-11-29 | drm/i915/dsc: Enable and disable appropriate power wells for VDSC | Manasi Navare | 1 | -0/+26 |
2018-11-29 | drm/i915/dp: Disable DSC in source by disabling DSS CTL bits | Manasi Navare | 1 | -0/+31 |
2018-11-29 | drm/i915/dp: Configure Display stream splitter registers during DSC enable | Manasi Navare | 1 | -0/+22 |
2018-11-29 | drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes | Manasi Navare | 1 | -0/+21 |
2018-11-29 | drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling | Manasi Navare | 1 | -0/+409 |
2018-11-29 | drm/i915/dsc: Compute Rate Control parameters for DSC | Gaurav K Singh | 1 | -1/+124 |
2018-11-29 | drm/i915/dsc: Define & Compute VESA DSC params | Gaurav K Singh | 1 | -0/+456 |