summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/intel_vdsc.c
AgeCommit message (Expand)AuthorFilesLines
2019-06-17drm/i915: move modesetting output/encoder code under display/Jani Nikula1-966/+0
2019-04-30drm/i915: extract intel_vdsc.h from intel_drv.h and i915_drv.hJani Nikula1-0/+2
2019-03-05drm/dsc: Split DSC PPS and SDP header initialisationsDavid Francis1-2/+2
2019-03-05drm/dsc: Add native 420 and 422 support to compute_rc_paramsDavid Francis1-2/+2
2019-03-05drm/i915: Move dsc rate params compute into drmDavid Francis1-124/+1
2019-01-14drm/i915: Markup paired operations on display power domainsChris Wilson1-2/+2
2019-01-09drm/i915: drop all drmP.h includesJani Nikula1-1/+0
2018-11-29drm/i915/dsc: Enable and disable appropriate power wells for VDSCManasi Navare1-0/+26
2018-11-29drm/i915/dp: Disable DSC in source by disabling DSS CTL bitsManasi Navare1-0/+31
2018-11-29drm/i915/dp: Configure Display stream splitter registers during DSC enableManasi Navare1-0/+22
2018-11-29drm/i915/dp: Populate DSC PPS SDP and send PPS infoframesManasi Navare1-0/+21
2018-11-29drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enablingManasi Navare1-0/+409
2018-11-29drm/i915/dsc: Compute Rate Control parameters for DSCGaurav K Singh1-1/+124
2018-11-29drm/i915/dsc: Define & Compute VESA DSC paramsGaurav K Singh1-0/+456
generated by cgit v1.2.3 (git 2.39.0) at 2025-08-28 07:36:41 +0300