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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
gpu
/
drm
/
i915
/
intel_dsi.h
Age
Commit message (
Expand
)
Author
Files
Lines
2016-05-17
drm/i915/dsi: CABC support for Panel PWM backlight control
Deepak M
1
-0
/
+1
2016-05-17
drm/i915/dsi: Add DCS control for Panel PWM
Jani Nikula
1
-0
/
+3
2016-04-15
drm/i915: Compute DSI PLL parameters during .compute_config()
Ville Syrjälä
1
-5
/
+9
2016-04-07
drm/i915: Sharing the pixel_format_from_vbt to whole i915
Ramalingam C
1
-0
/
+1
2016-03-24
drm/i915/bxt: Fix DSI HW state readout
Imre Deak
1
-0
/
+1
2016-03-16
drm/i915: add for_each_port_masked macro
Jani Nikula
1
-3
/
+1
2016-03-16
drm/i915/dsi: start using enum mipi_dsi_pixel_format
Jani Nikula
1
-4
/
+6
2016-02-19
drm/i915/dsi: Using the bpp value wrt the pixel format
Deepak M
1
-0
/
+2
2016-01-08
drm/i915/dsi: abstract get pclk platform differences
Jani Nikula
1
-2
/
+1
2015-11-25
drm/i915: fix potential dangling else problems in for_each_ macros
Jani Nikula
1
-1
/
+1
2015-10-02
drm/i915/bxt: get DSI pixelclock
Shashank Sharma
1
-0
/
+1
2015-10-02
drm/i915/bxt: DSI disable and post-disable
Shashank Sharma
1
-0
/
+2
2015-09-23
drm/i915/bxt: Disable DSI PLL for BXT
Shashank Sharma
1
-1
/
+1
2015-09-23
drm/i915/bxt: Enable BXT DSI PLL
Shashank Sharma
1
-1
/
+1
2015-07-21
drm/i915: Use the CRC gpio for panel enable/disable
Shobhit Kumar
1
-0
/
+3
2015-01-29
drm/i915/dsi: add drm mipi dsi host support
Jani Nikula
1
-0
/
+18
2015-01-29
drm/i915/dsi: switch to drm_panel interface
Jani Nikula
1
-25
/
+2
2015-01-27
drm/i915/dsi: remove unnecessary dsi device callbacks
Jani Nikula
1
-20
/
+0
2015-01-27
drm/i915/dsi: call wait_for_dsi_fifo_empty() for each dsi port
Jani Nikula
1
-12
/
+0
2014-12-05
drm/i915: Pixel Clock changes for DSI dual link
Gaurav K Singh
1
-0
/
+6
2014-12-05
drm/i915: Add support for port enable/disable for dual link configuration
Gaurav K Singh
1
-0
/
+1
2014-12-03
drm/i915/dsi: add ports to intel_dsi to describe the ports being driven
Jani Nikula
1
-0
/
+3
2014-12-03
drm/i915/dsi: clean up MIPI DSI pipe vs. port usage
Jani Nikula
1
-0
/
+16
2014-08-08
drm/i915: Add support for Video Burst Mode for MIPI DSI
Shobhit Kumar
1
-0
/
+2
2014-08-07
drm/i915: Add correct hw/sw config check for DSI encoder
Shobhit Kumar
1
-0
/
+1
2014-06-05
drm/i915: Add support for Generic MIPI panel driver
Shobhit Kumar
1
-0
/
+2
2014-05-16
drm/i915: MIPI PPS delays added
Shobhit Kumar
1
-0
/
+7
2014-05-16
drm/i915: MIPI init count programming as generic parameter
Shobhit Kumar
1
-0
/
+2
2014-05-16
drm/i915: Correct MIPI operation mode as per expected values from VBT
Shobhit Kumar
1
-1
/
+3
2014-04-09
drm/i915: Parameterize the Clockstop and escape_clk_div
Shobhit Kumar
1
-1
/
+3
2013-12-12
drm/i915: Parametrize the dphy and other spec specific parameters
Shobhit Kumar
1
-0
/
+14
2013-12-12
drm/i915: Reorganize the DSI enable/disable sequence
Shobhit Kumar
1
-0
/
+2
2013-12-12
drm/i915: Add more dev ops for MIPI sub encoder
Shobhit Kumar
1
-0
/
+5
2013-09-04
drm/i915: add VLV DSI PLL Calculations
ymohanma
1
-0
/
+3
2013-09-04
drm/i915: add structs for MIPI DSI output
Jani Nikula
1
-0
/
+99