index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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log msg
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path:
root
/
drivers
/
gpu
/
drm
/
i915
/
intel_cdclk.c
Age
Commit message (
Expand
)
Author
Files
Lines
2017-05-05
drm/i915: Fix rawclk readout for g4x
Ville Syrjälä
1
-4
/
+2
2017-04-06
drm/i915/glk: limit pixel clock to 99% of cdclk workaround
Madhav Chauhan
1
-3
/
+13
2017-03-22
drm/i915: Implement cdclk restrictions based on Azalia BCLK
Pandiyan, Dhinakaran
1
-0
/
+12
2017-03-22
drm/i915/glk: Apply cdclk workaround for DP audio
Pandiyan, Dhinakaran
1
-6
/
+11
2017-03-13
drm/i915: Use new atomic iterator macros in cdclk
Maarten Lankhorst
1
-1
/
+1
2017-03-07
drm/i915: remove potentially confusing IS_G4X checks
Paulo Zanoni
1
-2
/
+2
2017-02-08
drm/i915: Replace the .modeset_commit_cdclk() hook with a more direct .set_cd...
Ville Syrjälä
1
-46
/
+33
2017-02-08
drm/i915: Nuke the VLV/CHV PFI programming power domain workaround
Ville Syrjälä
1
-14
/
+0
2017-02-08
drm/i915: Move PFI credit reprogramming into vlv/chv_set_cdclk()
Ville Syrjälä
1
-1
/
+4
2017-02-08
drm/i915: Pass the cdclk state to the set_cdclk() functions
Ville Syrjälä
1
-30
/
+48
2017-02-08
drm/i915: Pass dev_priv to remainder of the cdclk functions
Ville Syrjälä
1
-15
/
+10
2017-02-08
drm/i915: Track full cdclk state for the logical and actual cdclk frequencies
Ville Syrjälä
1
-45
/
+78
2017-02-08
drm/i915: Start moving the cdclk stuff into a distinct state structure
Ville Syrjälä
1
-156
/
+226
2017-02-08
drm/i915: Pass computed vco to bxt_set_cdclk()
Ville Syrjälä
1
-14
/
+19
2017-02-08
drm/i915: Move most cdclk/rawclk related code to intel_cdclk.c
Ville Syrjälä
1
-0
/
+1794